850V NMOS driver with active outputs

Abstract

This paper dcscribes a unique second gcncration fully intcgratcd NMOS dcvicc opcrating at up to 850V. The 5.46x5.26 mm2 chip consists of 16 pull-up/pull-down high voltage output drivers, a 16 bit shift rcgistcr, and gating logic. 'I'hc HV output drivers are compriscd of two high voltage transistors and a polysilicon pull-up rcsistor, fabricatcd on a 70Q-cm substrate, without dielcctric isolation or epitaxial material. Thc high voltage transistors have closcd geometry with a two layer polysilicon field platc. Onc layer of the field plate has high sheet resistance to sct the surface potential above the n-drift rcgion.Thc low voltage logic is standard 'ITL compatible NMOS, isolated from the high volrage by a grounded barrier. An analysis of the high voltage transistors, based on a solution of Poisson's Equation', is prcscntcd which emphasizes the effect of the overlaying mctal linc on the transistor's pcrformancc. INI'KODUCTION MOS Integrated circuits for high voltage display driving are desirable because of their low cost. A numbcr of ICs, combining a medium scale of low voltage integration and high voltage open drain transistors have appeared in thc l i t e r a t~r e~-~. These require extcrnal componcnts to provide high voltage to each output. The pull-up can bc provided by a resistor or by a combination of active and passive components. In previous work we reported an IC which incorporated on chip pull-up and pull-down capability5. To be reliable high voltage MOS transistors must be operated we!l below thcir breakdown voltage, they must be able to withstand momentary overvoltages, and they should be uneffected by charge on the top surface of the chip. In order to obtain a chip operating at higher voltages and with greater reliability a study of the limitations to device operation has been performed and a new design has been completed. 0VE:RVIF.W OF DEVICE This IC provides 16 high voltage outputs which activcly switch high or low and arc controllcd by on-chip low voltage logic. The low voltagc logic consists of a 16 bit shift register connecting to latches and control gates for cach output. 'Thc shift rcgistcr has an output to allow similar chips to bc cascadcd for largcr systems. It is compatiblc with nonrial MOS and ITTI. logic voltage levcls. The four powcr supply conncctions are Ground, nominal 5V (for the low voltage logic), nominal 15V (for driving the input to the high voltagc output stage), and the high voltagc supply.The chip is laid out with thc high voltage stagc around the olltside on thrce sides, Fig. 1, scparatcd fiom the low voltagc logic by a barricr of grounded n + , Inctal. and polysilicon, the only gaps arc for the polysilicon crossovcrs. Contact and pad cuts opcn the barricr to all layers, preventing chargc spreading. 'The high voltage supply fccds the 16 outputs from a mctal linc about the outsidc of the chip, Each high voltagc output stagc consists of a pull up and a pull down high voltage transistor, an output protection transistor and a pull up rcsistor. See Fig. 2. Thc circuit opcratcs as ...

Review of technologies for high-voltage integrated circuits

“…As shown in Fig. 14, the new charge balance is introduced by the single-layer or double-layer floating field plate [49] . As the charge Fig.…”

“…13 Junction termination extension structure in HVI structure. Ionized negative charges from the surface's Pregion are introduced to keep a new charge balance with Q E [49] .…”

“…Fig. 14 Cross section of LDMOS using HVI structures with single-and double-layer floating field plate [49] .…”