8 GHz Tunable CMOS Quadrature Generator using Differential Active Inductors

Mahmoudi, F.; Salama, C.A.T.

doi:10.1109/iscas.2005.1465036

Cited by 7 publications

(1 citation statement)

References 11 publications

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“…The stabilizer was added to the design to stabilize the common-mode behavior of the differential active inductor by moving the common-mode right half-plane pole of the inductor, which may cause instability, to the left-half-plane. In the differential mode of operation, the common-mode stabilizer appeared as an impedance Z o with a real part given by [34]:…”

Section: Mahmoudi and Salama Active Inductormentioning

confidence: 99%

Floating Active Inductor Based Trans-Impedance Amplifier in 0.18 μm CMOS Technology for Optical Applications

Chen

Takahashi

2019

Electronics

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In this paper, a transimpedance amplifier (TIA) based on floating active inductors (FAI) is presented. Compared with conventional TIAs, the proposed TIA has the advantages of a wider bandwidth, lower power dissipation, and smaller chip area. The schematics and characteristics of the FAI circuit are explained. Moreover, the proposed TIA employs the combination of capacitive degeneration, the broadband matching network, and the regulated cascode input stage to enhance the bandwidth and gain. This turns the TIA design into a fifth-order low pass filter with Butterworth response. The TIA is implemented using 0.18 μ m Rohm CMOS technology and consumes only 10.7 mW with a supply voltage of 1.8 V. When used with a 150 fF photodiode capacitance, it exhibits the following characteristics: gain of 41 dB Ω and −3 dB frequency of 10 GHz. This TIA occupies an area of 180 μ m × 118 μ m.

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Section: Mahmoudi and Salama Active Inductormentioning

confidence: 99%

Floating Active Inductor Based Trans-Impedance Amplifier in 0.18 μm CMOS Technology for Optical Applications

Chen

Takahashi

2019

Electronics

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8 GHz 1V, CMOS quadrature downconverter for wireless applications

Mahmoudi

Salama

2006

Analog Integr Circ Sig Process

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The design and implementation of an 8 GHz CMOS quadrature downconverter, achieving simultaneously low voltage supply operation and good linearity is presented in this paper. This is achieved by relaxing the inherent tradeoff between power conversion gain and linearity governing all active mixers and implementing a mixer using a new version of the bias-offset technique. The quadrature generator uses active inductors embodied in the LO buffer, and provides easy tuning by relaxing the coupling between amplitude and phase tuning of the outputs. It also provides reduced power consumption by eliminating the buffers located between the quadrature generator and the mixers. A prototype implemented in a 0.18 µm CMOS technology occupies an area of 0.44 × 0.3 mm 2 , operates from a 1V power supply and features an IIP3 of +3.5 dBm, an IIP2 of better than +48 dBm, an input compression point of −5.5 dBm, a power conversion gain of +6.5 dB for the mixers and a quadrature phase and amplitude matching of better than 1.5 • and 1 dB respectively over a bandwidth of 100 MHz after tuning. The overall power consumption of the quadrature downconverter is 25.8 mW.

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