2016
DOI: 10.1109/led.2016.2614515
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600 V/ $1.7~\Omega$ Normally-Off GaN Vertical Trench Metal–Oxide–Semiconductor Field-Effect Transistor

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Cited by 114 publications
(55 citation statements)
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“…The device presented a Vth of 7.9 V (from extrapolation in linear scale) along with a 125%-higher gm, up to 300 S/cm 2 as compared to the quasi-vertical device [23]. The Vth, defined at IDS of 20 A/cm 2 , was 6.4 V. Such a relatively small Vth value is mainly due to donor-type N-vacancies present in the trench sidewall as a result of defects from the dry-etching process [13], [17], [18]. The negative hysteresis of ~ 2 V (at a current density of 0.2 kA/cm 2 ) observed in the IDS-VGS curves is likely due to bulk oxide traps [35], which can be addressed with a better quality gate oxide deposition and post-deposition annealing.…”
Section: Resultsmentioning
confidence: 93%
“…The device presented a Vth of 7.9 V (from extrapolation in linear scale) along with a 125%-higher gm, up to 300 S/cm 2 as compared to the quasi-vertical device [23]. The Vth, defined at IDS of 20 A/cm 2 , was 6.4 V. Such a relatively small Vth value is mainly due to donor-type N-vacancies present in the trench sidewall as a result of defects from the dry-etching process [13], [17], [18]. The negative hysteresis of ~ 2 V (at a current density of 0.2 kA/cm 2 ) observed in the IDS-VGS curves is likely due to bulk oxide traps [35], which can be addressed with a better quality gate oxide deposition and post-deposition annealing.…”
Section: Resultsmentioning
confidence: 93%
“…While the lateral AlGaN/GaN high electron mobility transistors (HEMTs) continue to penetrate the 600 V -class medium-power electronics market, vertical GaN devices are developed for high-voltage high-current applications. In the past few years, numerous GaN vertical power transistors have been reported on freestanding GaN substrates [1][2][3][4][5][6][7][8][9]. However, the high cost and small available size of bulk GaN substrates could limit the widespread commercial adoption of vertical power devices on bulk GaN.…”
Section: Introductionmentioning
confidence: 99%
“…The gate recess utilized a sequential dry and wet etching in order to result in smooth and ≈80° slanted sidewalls and round corners at the bottom of the trench as shown in Figure b. The device transfer curves shown in linear and semi‐log plots are shown in Figure c and exhibit a device threshold voltage of ≈8 V and an I on / I off ratio of 10 7 approaching that of recently developed GaN‐on‐GaN trench‐gate MISFETs . The device output curves are shown in Figure d exhibiting good saturation characteristics and R on value of 31.5 mΩ cm 2 with a gate width of 100 µm (50 µm × 2; see the Supporting Information).…”
mentioning
confidence: 97%