55nm CMOS Analog Circuit Implementation of LIF and STDP Functions for Low-Power SNNs

Yang, Zhitao; Han, Zhujiang; Huang, Yucong; Ye, Terry Tao

doi:10.1109/islped52811.2021.9502497

Cited by 16 publications

(10 citation statements)

References 15 publications

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“…Low energy cost is pursued in today's applications, and the energy consumption is one of the most important concerns of a memristive system, especially in artificial neural network applications. As shown in Figure 6a, most artificial synaptic devices based on complementary metal-oxide semiconductor (CMOS) technology typically operate at ˜nJ per synaptic event level [67][68][69], and only a few studies reach several tens of pJ [70,71]. By exploiting memristive devices, it is much easier to emulate an artificial synaptic device with an energy cost of few pJ per synaptic event level [72,73] and can even approach hundreds of fJ [74,75], which is much closer to the energy cost of the human brain, i.e., 10 fJ per synaptic event, in comparison to CMOS approaches [76].…”

Section: Applications Scenariosmentioning

confidence: 99%

Review on Resistive Switching Devices Based on Multiferroic BiFeO3

et al. 2023

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This review provides a comprehensive examination of the state-of-the-art research on resistive switching (RS) in BiFeO<sub>3</sub> (BFO)-based memristive devices. By exploring possible fabrication techniques for preparing the functional BFO layers in memristive devices, the constructed lattice systems and corresponding crystal types responsible for RS behaviors in BFO-based memristive devices are analyzed. The physical mechanisms underlying RS in BFO-based memristive devices, i.e., ferroelectricity and valence change memory, are thoroughly reviewed, and the impact of various effects such as the doping effect, especially in the BFO layer, is evaluated. Finally, this review provides the applications of BFO devices and discusses the valid criteria for evaluating the energy consumption in RS and potential optimization techniques for memristive devices.

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Section: Applications Scenariosmentioning

confidence: 99%

Review on Resistive Switching Devices Based on Multiferroic BiFeO3

et al. 2023

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“…Subsequently, when V trigger goes low, it activates M trigger and raises the V mem potential, indicating a spike. The crucial two transistors, M rp and M n1 , act as a switch, while other transistors operate sub-threshold weak signals [9], [10], [16]. In continuation, the reset circuitry comprises a refractory mechanism along with positive feedback to obtain desired time interval between the spikes, which enables bio-plausibility like depolarization and hyperpolarization.…”

Section: ) Hysteresis Comparator (Low Power Schmitt Trigger)mentioning

confidence: 99%

“…Despite the fact that the LIF neural model can be used to simulate a multitude of neurons, it is hard to generate complex spiking patterns. Nonetheless, the LIF neuron is an essential part of the application of SNN as per the reference [4], [9], [10]. The primary mechanism behind the model involves three main sections: the leaky circuit, comparator circuit, and reset circuit.…”

Section: Integrate and Fire (If) Modelmentioning

confidence: 99%

Biologically Inspired Tonic and Bursting LIF Neuron Model for Spiking Neural Network: A CMOS Implementation

Ahmed,

Saha

2023

Preprint

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The core part of the neuromorphic processors enti-tled as spiking neural network (SNN), which is more biologicallyplausible than ANN, where the signal is propagated in the form ofa spike. This perception seeks to create hardware systems thatresemble the brain in both shape and function; these systemsare comprised of artificial bio-neurons and synapses and can bescaled to the size of the brain. Many researchers have developedvarious bio-plausible neuron models to attain precise neuronvalues. This paper proposes a sub-threshold implementation ofthe Leaky Integrate and Fire (LIF) neuron model, which emulatesthe spiking behavior which is generally observed in biology.The models comprise analog and mixed (Analog and Digital)circuits that mimic biological spiking behaviors and exhibit bio-electric potential differences. The neuron models are simulatedin Cadence Virtuoso GPDK 45nm Technology and the multi-sim simulator powered by National Instruments to understandthe different spiking behaviors. The spike pulses with differentshapes and magnitudes, which are the functions of membranepotential and also applicable to realize the spiking behavior ofSNNs. The proposed neuron model operates at 1V power and 1msstep pulse, where it consumes less power (4.377μW ) and minimalenergy (761.146f J) per spike. The measured spike pulse widthstands at 15.823μs, while the refractory time period of the pulseis determined to be 57.795μs. The proposed model also comparedwith popular models like Hodgkin-Huxley and Izhikevich modelsin terms of the spike pattern.

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“…The coordinate rotation digital computer (CORDIC) algorithm [15] which employs SNN has been shown to enable the design of low power digital cicuits. Recent works have also further proven the lowpower and low-resource advantages of SNN on hardware [16], [17]. SNNs employ spike timing drpendent plasticity (STDP) to operate.…”

Section: Spiking Neural Networkmentioning

confidence: 99%

“…With the 35-bit binary ECG data, the SNN in [16] can be adapted to classify the data as shown in Figure 5. The pseudocode for increment of array pointer is shown in Figure 5(a), where the switching of data is controlled by Image_Signal(0) and Image_Signal (1).…”

Section: Trainingmentioning

confidence: 99%

Neuromorphic solutions: digital implementation of bio-inspired spiking neural network for electrocardiogram classification

Chen

Wong

2022

IJEECS

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Conventional techniques of off-chip processing for wearable devices cause high hardware resource usage which leads to heat generation and increased power consumption. <span>Hence, edge computing methods such as neuromorphic computing are considered the most promising modern technology to replace conventional processing. It is beneficial to employ neuromorphic processing in electrocardiogram (ECG) classification, enabling engineers to overcome the constraints of heat generation caused by hardware utilization. Thus, this work aims to investigate common building blocks in a spiking neural network (SNN), analyze the spike-based plasticity mechanism and implement ECG classification on a neuromorphic circuit. The MIT-BIH Arrhythmia database (MITDB) is preprocessed in MATLAB, then used to train and test an SNN designed for field programmable gate arrays (FPGA), employing spike-based plasticity and Izhikevich neurons. The behaviour of spike timing dependent plasticity (STDP) in a neuromorphic circuit is also visualized in this work. The state-of the-art performance of this work lies in providing a generic mechanism to adapt ECG classification into a neuromorphic solution, a non-Von Neumann architecture. The proposed digital design utilizes 1.058% of hardware resources on a Zedboard. Application-wise, this work provides a foundation for development of neuromorphic computing in wearable medical devices that perform continuous monitoring of ECG</span>.

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55nm CMOS Analog Circuit Implementation of LIF and STDP Functions for Low-Power SNNs

Cited by 16 publications

References 15 publications

Review on Resistive Switching Devices Based on Multiferroic BiFeO3

Review on Resistive Switching Devices Based on Multiferroic BiFeO3

Biologically Inspired Tonic and Bursting LIF Neuron Model for Spiking Neural Network: A CMOS Implementation

Neuromorphic solutions: digital implementation of bio-inspired spiking neural network for electrocardiogram classification

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