5.2 A 118dB-PSRR 0.00067%(−103.5dB) THD+N and 3.1W fully differential class-D audio amplifier with PWM common-mode control

Abstract

A high power-supply rejection ratio (PSRR) and high-linearity Class-D audio amplifier (CDA) becomes important as the CDA is directly connected to a battery supply for efficiency considerations in mobile phone applications. Several closed-loop pulse-width-modulation (PWM) CDAs with high PSRR (>90dB) have been published recently. In conventional PWM fully differential CDAs [1,2], these designs are focused on increasing differential loop gain to improve PSRR. However, the PSRR is mainly limited by feedback gain-matching, that is, resistor matching of the feedback network; hence, it is difficult to achieve PSRR >80dB for yield >99%. In [3], a pseudo-differential structure composed of two singleended opamps is adopted to achieve PSRR >90dB. Nevertheless, it suffers from 3dB noise increase as compared to the fully differential counterpart. Moreover, unity-gain bandwidth (GBW) of single-ended opamps is usually smaller than that of fully differential opamps due to the design trade-off between noise and the location of current-mirror poles; hence, it results in low in-band gain and high total harmonic distortions (THDs) of pseudo-differential CDAs. As for linearity, conventional PWM CDAs suffer from poor linearity due to in-band aliasing tones. In the uniform PWM (UPWM) architecture [4] that achieves THD+N of around -96.5dB, a sinc function, realized by using a sample-and-hold circuit in front of the loop filter, is applied to avoid the signal-dependent intermodulations folding back in-band. However, high switching frequency is required and the power consumption is increased.In this work, a 1 st -order PWM common-mode (CM) control loop is introduced in the fully differential CDA to overcome the design challenge of PSRR and linearity. Input feed-forward with passive summing is employed to reduce internal swing and signal-dependent terms to further enhance linearity. A singleamplifier-biquad technique is adopted to reduce the number of opamps for further power reduction. The CDA achieves 118dB PSRR and 0.00067% (-103.5dB) THD+N. It delivers maximum output power of 3.1W into a 4Ω load under 5.5V battery voltage.Figure 5.2.1(a) depicts a linear model of a conventional closed-loop fullydifferential CDA. With the gain mismatch, δ, of the differential feedback path, the supply noise and even harmonic distortions (HDs), denoted by e C , contribute (δ×e C ) to the differential output (v OP -v ON ). The differential-mode noise and odd HDs, denoted by e D , are suppressed by the loop gain H(s). PSRR can only be improved by reducing δ while a stringent matching requirement of δ<0.001% is required in order to achieve PSRR >100dB. As shown in Fig. 5.2.1(b), a CM control loop is adopted to suppress e C . The derivation shows that e C is further suppressed by the loop gain of the CM control loop, H C (s). The supply noise and even HDs at the CDA output are improved from (δ×e C ) to (δ×e C /H C ). Consequently, the CM control loop is of great help to improve the PSRR and reduce the THD of a fully-differential CDA.Figure 5.2.2 shows the sy...