4H-SiC(0001) Surface Faceting during Interaction with Liquid Si

Abstract

The aim of this study was to find conditions allowing the "natural" formation of a regular and controllable step bunched morphology on a 4H-SiC seed without the need of any SiC deposition. This was performed by melting a bulk piece of Si on a 4°off 4H seed in the temperature range of 1500 - 1600°C, for 15 min. After etching the remaining Si, the 4H surface was found to be successfully highly step bunched with steps very parallel and regular. A mechanism of dissolution-precipitation was proposed, which could occur both on a short (step to step) and long (centre to periphery) range. This process is kinetically limited at low temperature (1500-1550°C) and considered to be close to the equilibrium at 1600°C.

Analysis of 4H-SiC MOS Capacitors on Macro-Stepped Surfaces

“…In this study, we firstly produced 4H-SiC macrostepped surfaces using a bulk Si melting process (see ref. [9] for details). Then compared samples without (standard, STD) and with (with Macro Steps wMS) macrosteps in terms of D it for three different oxidation processes finding a systematic improvement in the case of the samples with macrosteps.…”

Two-dimensional defect mapping of the SiO2/4H−SiC interface

“…While a noncapped annealing step often leads to a carbon-rich surface, chemical analysis of Si-capped samples confirmed a Si-rich surface reconstruction [21]. Using this approach, macrosteps with heights of up to 200 nm and terrace widths of several micrometers have been reported [20], an order of magnitude larger than what is commonly observed for surface reconstruction processes without any capping [22,23].…”

“…A strong and continuous macrostep formation was obtained by a Si-melt process where a piece of Si was melted on top of the 4H-C wafer [20]. After this process, the solidified silicon was removed by etching the samples for several hours in a solution of HF + HNO 3 .…”

“…In order increase the size and density of the macrosteps and thus allow for the analysis of individual macrostep facets, a high-temperature process can be employed, leading to a surface reconstruction with an amplification of the macrosteps. Here we use a so-called Si-melt process where the SiC surface is capped with a Si piece during the high-temperature annealing [19,20]. While a noncapped annealing step often leads to a carbon-rich surface, chemical analysis of Si-capped samples confirmed a Si-rich surface reconstruction [21].…”

Macrosteps formation on 4H-SiC surfaces via Si melting within a sandwich configuration

“…Liquid phase growth of 4H-SiC is known to generate very large terraces but one cannot use this technique for elaborating the n-doped epilayer of a MOSFET due to too high residual doping level of these liquid phase grown layers [11]. Alternatively, the only contact of a Si-based solution onto a 4°off 4H-SiC surface is known to generate a reconstruction leading to macrosteps formation [12] [13]. These few related works systematically involved the use of pure liquid Si, in a sessile drop configuration, to produce terraces of a few µm in width, which is more than 100 times wider than those found in standard epitaxial surfaces grown by CVD.…”