2000
DOI: 10.1889/1.1832861
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48.3: Invited Paper: P‐type Technology for Large Size Low Temperature Poly‐Si TFT‐LCDs

Abstract: The fabrication process of low temperature poly‐Si (LTPS) TFT can be simplified by p‐type technology. It is expected that the cost and the yield of LTPS will be improved. Both integrated driving circuits and pixel switches consist of p‐type TFTs. The characteristics of the panel, the power consumption in the driving circuit, and the reliability of the panel are investigated. The driving circuits are designed to have large immunity to the variation of TFT characteristics and to operate with low power consumptio… Show more

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Cited by 38 publications
(29 citation statements)
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“…In the past, we developed an LTPS CMOS process which requires only five photolithographic mask steps and a single ion-implantation step compared to up to six mask steps and two implantation steps that are usually required to implement CMOS TFTs. 3 To achieve low off currents, an lowdoped drain (LDD) structure must be implemented. 4 This requires another implantation step and often also a further lithographic step, which are not required in our process.…”
Section: Ltps Processmentioning
confidence: 99%
“…In the past, we developed an LTPS CMOS process which requires only five photolithographic mask steps and a single ion-implantation step compared to up to six mask steps and two implantation steps that are usually required to implement CMOS TFTs. 3 To achieve low off currents, an lowdoped drain (LDD) structure must be implemented. 4 This requires another implantation step and often also a further lithographic step, which are not required in our process.…”
Section: Ltps Processmentioning
confidence: 99%
“…The SPICE model is RPI poly-Si TFT model (level = 36) and the simulation parameters for TFT and OLED are extracted from the measurements. The low-temperature (450 o C) p-type poly-Si TFTs are fabricated by the typical TFT process such as PECVD a-Si film deposition, ELA with line beam laser irradiation, and ion implantation for doping [6]. The size of poly-Si TFT is W/L = 10 µm/10 µm, and the measured V TH is −2.11V and µ eff is 80 cm 2 /V·s.…”
Section: Simulation and Fabricationmentioning
confidence: 99%
“…If the yield of driving circuits drops, Poly-Si TFT-LCDs may not be able to compete with conventional TFT-LCDs. This is a reason why only the gate driver, which is much simpler than the data driver, is integrated on the panel in today's mid-size Poly-Si TFT-LCDs [3][4]. This paper focuses on the yield of S/R chains in PolySi TFT-LCDs.…”
Section: Introductionmentioning
confidence: 99%