4.5 A 1.8e&lt;inf&gt;rms&lt;/inf&gt;<sup>−</sup> temporal noise over 110dB dynamic range 3.4µm pixel pitch global shutter CMOS image sensor with dual-gain amplifiers, SS-ADC and multiple-accumulation shutter

Kobayashi, Masahiro; Onuki, Yusuke; Kawabata, Kazunari; Sekine, Hiroshi; Tsuboi, Takayuki; Matsuno, Yasushi; Takahashi, Hidekazu; Koizumi, Toru; Sakurai, Katsuhito; Yuzurihara, Hiroshi; Inoue, Shunsuke; Ichikawa, Takeshi

doi:10.1109/isscc.2017.7870267

Cited by 16 publications

(12 citation statements)

References 4 publications

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“…[24] is obtained by the same CIS chip in Ref. [23]. Because it is not clear the reason why twotimes better FoM than that in Ref.…”

Section: Fom-based Performance Evaluation Of Column-parallel Adcs Formentioning

confidence: 96%

“…Adaptive-gain amplification as shown in Fig. 7 is one of effective ways for low-noise extended dynamic range CISs [23], [78]. The gain is given by C 1 /C 2 .…”

Section: Cyclic Adc and Cyclic-based Pipelined Adcmentioning

confidence: 99%

“…(21). This FoM is recently often used for evaluating CISs with introducing new techniques for extended dynamic range [20], [23], [82].…”

Section: Definition Of Figures Of Merit Of Cmos Image Sensors With Comentioning

confidence: 99%

“…The front-line of the best FoM in this definition is currently around 1.5 [(e-) 2 nJ] due to the development of CISs of Ref. [23] reported in 2017 which uses a global shutter pixel and dual-gain amplified single-slope ADC and Ref. [20] reported in 2015 which uses BSI, 3D-Stacking, and a single-slope ADC.…”

Section: Fom-based Performance Evaluation Of Column-parallel Adcs Formentioning

confidence: 99%

“…The frontline of the best FoM in this definition is currently around 0.25 [e-pJ/DRU], and the CISs of Ref. [23] using dual-gain adaptive amplification and Ref. [68] using incremental 2 nd -order Delta-Sigma ADC are on the frontline.…”

Section: Fom-based Performance Evaluation Of Column-parallel Adcs Formentioning

confidence: 99%

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Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations

Kawahito

2018

IEICE Trans. Electron.

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This paper reviews architectures and topologies for column-parallel analog-to-digital converters (ADCs) used for CMOS image sensors (CISs) and discusses the performance of CISs using columnparallel ADCs based on figures-of-merit (FoM) with considering noise models which behave differently at low/middle and high pixel-rate regions. Various FoM considering different performance factors are defined. The defined FoM are applied to surveyed data on reported CISs using columnparallel ADCs which are categorized into 4 types; single slope, SAR, cyclic and delta-sigma ADCs. The FoM defined by (noise) 2 (power)/(pixel-rate) separately for low/middle and high pixel-rate regions well explains the frontline of the CIS' performance in all the pixel rates. Using the FoM defined by (noise) 2 (power)/(intrascene dynamic range)(pixel-rate), the effectiveness of recently-reported techniques for extended-dynamic-range CISs is clarified.

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“…[24] is obtained by the same CIS chip in Ref. [23]. Because it is not clear the reason why twotimes better FoM than that in Ref.…”

Section: Fom-based Performance Evaluation Of Column-parallel Adcs Formentioning

confidence: 96%

“…Adaptive-gain amplification as shown in Fig. 7 is one of effective ways for low-noise extended dynamic range CISs [23], [78]. The gain is given by C 1 /C 2 .…”

Section: Cyclic Adc and Cyclic-based Pipelined Adcmentioning

confidence: 99%

“…(21). This FoM is recently often used for evaluating CISs with introducing new techniques for extended dynamic range [20], [23], [82].…”

Section: Definition Of Figures Of Merit Of Cmos Image Sensors With Comentioning

confidence: 99%

Section: Fom-based Performance Evaluation Of Column-parallel Adcs Formentioning

confidence: 99%

Section: Fom-based Performance Evaluation Of Column-parallel Adcs Formentioning

confidence: 99%

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Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations

Kawahito

2018

IEICE Trans. Electron.

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A 256 × 256 CMOS image sensor with differential readout and data converter circuits

Karamzadeh

Teymouri

Dousti

et al. 2023

Circuit Theory & Apps

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Summary In this paper, a 256 × 256 CMOS image sensor is introduced in which the pixel signals are read and converted into digital data in a completely differential mode. This technique helps to obtain pixel signals with higher linearity and accuracy compared with conventional methods. Improving the linearity and accuracy of the image sensor has a direct impact on increasing the quality of the generated images. The simulation results of the proposed pixel readout circuit show that the THD, SINAD, SNR, and SFDR are 0.45%, 47 dB, 66 dB, and 46 dB, respectively. The voltage gain of the proposed readout circuit is about 1, causing it to read the photodetector signals more accurately than the conventional methods. A full differential single‐slope ADC with a working frequency of 50 Mhz has the task of converting the pixel signal to 10 bits of digital data. The total power consumption of a column of sensors is about 80 μW. All the circuits are designed and implemented using 0.18‐μm CMOS technology in Virtuoso and simulated by the SPECTRE.

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High-Speed Multilevel Binary Imaging CMOS Image Sensor for Object Feature Extraction

Lee

Kim

2022

IEEE Sensors J.

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4.5 A 1.8e<inf>rms</inf>⁻ temporal noise over 110dB dynamic range 3.4µm pixel pitch global shutter CMOS image sensor with dual-gain amplifiers, SS-ADC and multiple-accumulation shutter

Cited by 16 publications

References 4 publications

Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations

Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations

A 256 × 256 CMOS image sensor with differential readout and data converter circuits

High-Speed Multilevel Binary Imaging CMOS Image Sensor for Object Feature Extraction

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4.5 A 1.8e<inf>rms</inf>− temporal noise over 110dB dynamic range 3.4µm pixel pitch global shutter CMOS image sensor with dual-gain amplifiers, SS-ADC and multiple-accumulation shutter

Cited by 16 publications

References 4 publications

Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations

Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations

A 256 × 256 CMOS image sensor with differential readout and data converter circuits

High-Speed Multilevel Binary Imaging CMOS Image Sensor for Object Feature Extraction

Contact Info

Product

Resources

About

4.5 A 1.8e<inf>rms</inf>⁻ temporal noise over 110dB dynamic range 3.4µm pixel pitch global shutter CMOS image sensor with dual-gain amplifiers, SS-ADC and multiple-accumulation shutter