2022
DOI: 10.35848/1882-0786/ac6729
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4.4 kV β-Ga2O3 MESFETs with power figure of merit exceeding 100 MW cm−2

Abstract: β-Ga2O3 metal-semiconductor field-effect transistors are realized with superior reverse breakdown voltages (VBR) and ON currents (IDMAX). A sandwiched SiNx dielectric field-plate design is utilized that prevents etching-related damage in the active region and a deep mesa-etching was used to reduce reverse leakage. The device with LGD=34.5μm exhibits an IDMAX of 56 mA/mm, a high ION/IOFF ratio >108 and a very low reverse leakage until catastrophic breakdown at ∼4.4kV. A power figure of merit (PFOM) of 132 … Show more

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Cited by 48 publications
(36 citation statements)
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“…A cross-sectional schematic of a Ga 2 O 3 metal-oxide-semiconductor field-effect transistor (MOSFET) fabricated on the composite wafer is shown in Figure a. Device processing started with mesa isolation using a patterned Ni/SiO 2 hard mask and directional dry etching using an inductively coupled plasma reactive ion etching (ICP-RIE) with SF 6 -Ar plasma chemistry (600 W ICP, 150 RF powers–45 nm/min etch rate for Ga 2 O 3 ). , This was followed by source–drain region patterning using the same Ni/SiO 2 patterning process and contact region recessing using a low-power ICP-RIE SF 6 -Ar (150 W ICP, 50 RF powers–1.5 nm/min etch rate for Ga 2 O 3 ) . After selectively wet etching Ni, the sample with the patterned SiO 2 mask was loaded into the MOVPE reactor for ohmic contact regrowth.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…A cross-sectional schematic of a Ga 2 O 3 metal-oxide-semiconductor field-effect transistor (MOSFET) fabricated on the composite wafer is shown in Figure a. Device processing started with mesa isolation using a patterned Ni/SiO 2 hard mask and directional dry etching using an inductively coupled plasma reactive ion etching (ICP-RIE) with SF 6 -Ar plasma chemistry (600 W ICP, 150 RF powers–45 nm/min etch rate for Ga 2 O 3 ). , This was followed by source–drain region patterning using the same Ni/SiO 2 patterning process and contact region recessing using a low-power ICP-RIE SF 6 -Ar (150 W ICP, 50 RF powers–1.5 nm/min etch rate for Ga 2 O 3 ) . After selectively wet etching Ni, the sample with the patterned SiO 2 mask was loaded into the MOVPE reactor for ohmic contact regrowth.…”
Section: Resultsmentioning
confidence: 99%
“…A heavily Sidoped n+ (estimated 1.4 × 10 20 cm −3 ) Ga 2 O 3 layer was grown at 600 °C with an approximate thickness of 100 nm. 37 The sample was then cleaned in an HF solution, and the regrowth mask including regrown Ga 2 O 3 was selectively removed from all regions except the source−drain regions. This was followed by Ohmic metal evaporation of Ti/Au/Ni (20/100/50 nms) on the n + regions by photolithography and lift-off.…”
Section: Device Fabricationmentioning
confidence: 99%
“…After the standard solvent cleaning (Acetone/Methanol/DI water), the substrate was treated with HF followed by DI water. The growth of epilayer was performed in an Agnitron MOVPE reactor using Triethyl-Gallium (TEGa), O 2 and Silane (SiH 4 ) as precursors and Argon as carrier gas [29]- [31]. Hall measurements were performed on the samples and room temperature channel charge and mobility was extracted to be 1.5×10 13 cm −2 (∼3×10 17 cm −3 ) and 135 cm 2 V −1 sec −1 respectively.…”
Section: Device Fabricationmentioning
confidence: 99%
“…After the standard solvent cleaning (Acetone/Methanol/DI water), the substrate was treated with HF followed by DI water. The growth of epilayer was performed in an Agnitron MOVPE reactor using Triethyl-Gallium (TEGa), O 2 and Silane (SiH 4 ) as precursors and Argon as carrier gas [29]- [31]. Hall measurements were performed on the samples and This work was supported by the II-VI Foundation Block Gift Program and by the Air Force Office of Scientific Research under award number FA9550-21-0078.…”
Section: Device Fabricationmentioning
confidence: 99%