3D-Integrated Multichip Module Transceiver for Terabit-Scale DWDM Interconnects

Daudlin, Stuart; Rizzo, Anthony; Abrams, Nathan C.; Lee, Sunwoo; Khilwani, Devesh; Murthy, Vaishnavi; Robinson, James C.; Collier, Terence Q.; Molnar, Alyosha; Bergman, Keren

doi:10.1364/ofc.2021.th4a.4

Cited by 11 publications

(6 citation statements)

References 4 publications

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“…Moreover, normal-GVD Kerr combs inherently have high conversion efficiencies (typically >30%, with 86% experimentally demonstrated 40 ) and recently have been shown to synchronize to produce comb line powers otherwise unattainable 39,41 , providing a clear avenue to highly efficient chip-scale multi-wavelength sources. We fabricated the transmitter chip in a standard SOI process at a commercial foundry, enabling straightforward packaging with modern CMOS electronics for fully integrated transceivers either through heterogeneous 36 or monolithic 42 integration. This architecture also enables continued scaling in the number of wavelength channels as well as per-channel data rate with improved modulator designs 43 and is fully compatible with other common multiplexing techniques such as mode-division multiplexing 44,45 .…”

Section: Discussionmentioning

confidence: 99%

“…5a). This result is promising for future link iterations with reduced fibre-chip coupling losses and integrated high-sensitivity receiver modules 36,37 , as it shows that the generated comb lines can natively have enough optical power per line to close the link budget. To quantify crosstalk effects between adjacent comb lines on a single bus, we simultaneously modulated two lines at 200-GHz spacing and measured the BER values for both channels as a function of received optical power (Fig.…”

Section: Articlementioning

confidence: 90%

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Massively scalable Kerr comb-driven silicon photonic link

et al. 2023

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The growth of computing needs for artificial intelligence and machine learning is critically challenging data communications in today’s data-centre systems. Data movement, dominated by energy costs and limited ‘chip-escape’ bandwidth densities, is perhaps the singular factor determining the scalability of future systems. Using light to send information between compute nodes in such systems can dramatically increase the available bandwidth while simultaneously decreasing energy consumption. Through wavelength-division multiplexing with chip-based microresonator Kerr frequency combs, independent information channels can be encoded onto many distinct colours of light in the same optical fibre for massively parallel data transmission with low energy. Although previous high-bandwidth demonstrations have relied on benchtop equipment for filtering and modulating Kerr comb wavelength channels, data-centre interconnects require a compact on-chip form factor for these operations. Here we demonstrate a massively scalable chip-based silicon photonic data link using a Kerr comb source enabled by a new link architecture and experimentally show aggregate single-fibre data transmission of 512 Gb s−1 across 32 independent wavelength channels. The demonstrated architecture is fundamentally scalable to hundreds of wavelength channels, enabling massively parallel terabit-scale optical interconnects for future green hyperscale data centres.

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Section: Discussionmentioning

confidence: 99%

Section: Articlementioning

confidence: 90%

Massively scalable Kerr comb-driven silicon photonic link

et al. 2023

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“…The transceiver interleaves 64 parallel wavelength channels enabling the energy efficient scaling of multi-Tbps/mm 2 bandwidth density for future co-packaged chipsets. [75] In the same year, Cisco proposed a new solution to reduce the interconnect loss in both transmitter and 024201-6 receiver paths and a new low-power driver architecture to realize 800G optical links. [76] In 2021, Intel demonstrated a silicon photonic engine for high bandwidth density 800 Gbps using 3D integration.…”

Section: The 3d Integrationmentioning

confidence: 99%

Silicon-based optoelectronic heterogeneous integration for optical interconnection

Li 李,

Zhang 张

et al. 2024

Chinese Phys. B

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The performance of optical interconnection has improved dramatically in recent years. Silicon-based optoelectronic heterogeneous integration is the key enabler to achieve high performance optical interconnection, which not only provides the optical gain which is absent from native Si substrates and enables complete photonic functionalities on chip, but also improves the system performance through advanced heterogeneous integrated packaging. This paper reviews recent progress of silicon-based optoelectronic heterogeneous integration in high performance optical interconnection. The research status, development trend and application of ultra-low loss optical waveguides, high-speed detectors, high-speed modulators, lasers and 2D, 2.5D, 3D and monolithic integration are focused on.

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“…[60][61][62][63][64] The PIC pads will be µ-bumped after fabrication and ready for flip-chip bonding with the EIC driver chip designed accordingly, an approach demonstrated feasible in past works. 65,66 Wafer-scale substrate undercuts are placed near the resonant modulators/filters as well as the interleavers (Fig. 6d) for improving the thermal tuning efficiency of and reducing the thermal crosstalk between the thermal phase shifters.…”

Section: Pic Design Overviewmentioning

confidence: 99%

Scalable architecture for sub-pJ/b multi-Tbps comb-driven DWDM silicon photonic transceiver

Wang

Novick

Parsons

et al. 2023

Next-Generation Optical Communication: Components, Sub-Systems, and Systems XII

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The explosive growth of data-centric artificial intelligence applications calls for the next generation of optical interconnects for future hyperscale data centers and high-performance computing (HPC) systems. To unleash the full potential of dense wavelength-division multiplexing, we present the design and exploration of a novel transceiver architecture based on silicon photonic micro-resonators featuring a broadband Kerr frequency comb source and fabrication-robust (de-)interleaving structures. In contrast to the traditional single-bus architecture, our architecture de-interleaves the comb onto multiple buses before traversing separate banks of cascaded resonant modulators/filters, effectively doubling the channel spacing with each stage of de-interleaving. With a closed-form free spectral range (FSR) engineering technique guiding the micro-resonator design, the architecture is scalable toward hundreds of parallel channels-spanning much wider than the resonator FSRs-with minimal crosstalk penalty and thermal tuning overhead. This unique architecture, designed with co-packageability in mind, thus enables a multi-Tbps aggregated data rate with moderate per-channel data rates, paving the way for sub-pJ/b ultra-high-bandwidth chip-to-chip connectivity in future data centers and HPC systems.

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3D-Integrated Multichip Module Transceiver for Terabit-Scale DWDM Interconnects

Cited by 11 publications

References 4 publications

Massively scalable Kerr comb-driven silicon photonic link

Massively scalable Kerr comb-driven silicon photonic link

Silicon-based optoelectronic heterogeneous integration for optical interconnection

Scalable architecture for sub-pJ/b multi-Tbps comb-driven DWDM silicon photonic transceiver

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