2020
DOI: 10.1109/tcsii.2020.2968246
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360 nW Gate-Driven Ultra-Low Voltage CMOS Linear Transconductor With 1 MHz Bandwidth and Wide Input Range

Abstract: A low voltage linear transconductor is introduced. The circuit is a pseudo differential architecture that operates with ±0.2V supplies and uses 900nA total biasing current. It employs a floating battery technique to achieve low voltage operation. The transconductor has a 1MHz bandwidth. It exhibits a SNR = 72dB, SFDR = 42dB and THD = 0.83% for a 100mVpp 10kHz sinusoidal input signal. Moreover, stability is not affected by the capacitance of the signal source. The circuit has been validated with a prototype chi… Show more

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Cited by 16 publications
(12 citation statements)
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“…The high-resistance and small-capacitance values will result in high value of and small value of . Using (17), the denominator of the transfer function of the universal filter can be expressed as…”
Section: Non-ideal Analysismentioning
confidence: 99%
See 2 more Smart Citations
“…The high-resistance and small-capacitance values will result in high value of and small value of . Using (17), the denominator of the transfer function of the universal filter can be expressed as…”
Section: Non-ideal Analysismentioning
confidence: 99%
“…Thus, all the incremental parametric sensitivities for parameters and are below 1. Using (17), the characteristic equation of a quadrature oscillator can be written as…”
Section: Non-ideal Analysismentioning
confidence: 99%
See 1 more Smart Citation
“…The transconductor in [32] offers only single input that limits its applications. The transconductors in [33][34][35][36][37][38][39] offer differential input, however, these CMOS structures are constructed by two voltage to current (V-I) conversion units (VF or current conveyor) that increase the chip area and the total power consumption. The transconductor in [40] offers differential input with single V-I conversion unit based on promising structure of differential difference current conveyor (DDCC).…”
Section: The Multiple-input Transconductance Stagementioning
confidence: 99%
“…Consequently, the selection of suitable and simple design for very LVs power supplies and high-performance specifications CMOS Op-Amp circuits is very crucial because their performance specifications directly affect the overall performance specifications of the analog and mixed-signal ICs. The minimum and maximum input common-mode ( , respectively) and differential-mode range voltages in the classical CMOS gate-driven (GD) Op-Amp circuits topologies are relatively small and greatly influenced by the power supplies' voltages [14]. To overcome these shortcomings, several promising very LVs power supplies' design techniques have introduced to increase the and values of the very LVs power supplies and highperformance specifications CMOS Op-Amp circuits topologies.…”
Section: Introductionmentioning
confidence: 99%