28 nm CMOS process ESD protection based on diode-triggered silicon controlled rectifier

Li, Xiang; Dong, Shurong; Jin, Hao; Miao, Meng; Hu, Tao; Guo, Weican; Wong, Hei

doi:10.1016/j.sse.2017.07.012

Cited by 10 publications

(3 citation statements)

References 11 publications

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“…The diode-assisted triggering mechanism can effectively reduce the trigger voltage of SCR devices to achieve a narrower ESD design window for the application [ 19 ] and, in order to better meet the requirements of the new era of electronic power systems, several new schemes have been proposed. Li et al designed a 2D fine layout DTSCR to improve the ESD robustness of the device [ 20 ]. Additionally, the Sziklai/Darlington DTSCR proved to have faster turn-on speeds and excellent I–V static characteristics [ 21 ] and the DTSCR-EMOS-ID [ 22 ] has a lower trigger voltage, smaller parasitic capacitance and faster response time.…”

Section: Introductionmentioning

confidence: 99%

A Novel DTSCR Structure with High Holding Voltage and Enhanced Current Discharge Capability for 28 nm CMOS Technology ESD Protection

Han,

Chen,

Liu

et al. 2023

Micromachines

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To cope with the much narrower ESD design window in 28 nm CMOS technology, a novel diode-triggered silicon-controlled rectifier with an extra discharge path (EDP-DTSCR) for ESD protection is proposed in this paper. Compared with the traditional DTSCR, the proposed DTSCR has an enhanced current discharge capability that is achieved by creating a slave SCR path in parallel with the master SCR path. Moreover, the improved triggering and holding characteristic can be obtained by the proposed EDP-DTSCR. By sharing the anode emitter junction, a slave SCR path is constructed that is symmetrical to the position of the master SCR path to add an additional ESD discharge path to the EDP-DTSCR. In this way, the current discharge capability of the entire device is obviously improved. The TCAD simulation result shows that the proposed device has a remarkably lower on-resistance compared with the traditional DTSCR and the DTSCR with p-type guard ring (PGR-DTSCR). In addition, it is structurally optimized to further increase the holding voltage and reduce the trigger voltage to improve the anti-latching capability of the device, which is more conducive to the ESD protection window application of 28 nm CMOS technology.

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Section: Introductionmentioning

confidence: 99%

A Novel DTSCR Structure with High Holding Voltage and Enhanced Current Discharge Capability for 28 nm CMOS Technology ESD Protection

Han,

Chen,

Liu

et al. 2023

Micromachines

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show abstract

“…Though bidirectional ESD protection based on a simple back-to-back diode string has a good area efficiency ratio and a low trigger voltage under a positive bias state, it easily results in a large turn-on resistance (Ron) and Electronics 2023, 12, 4011 2 of 11 leakage current at the PN junction [7]. A diode-triggered SCR (DTSCR) can improve the ESD robustness and reduces the ON resistance [8,9], but it requires a parallel connection of two opposing-polarity one-directional DTSCRs to conduct both positive and negative ESD currents. The BDTSCR proposed by Liu et al [10] and the BLVSCR proposed by Du et al [11] realized dual-directional ESD protection, but the large Vt1 and ON resistance restrict their practical application.…”

Section: Introductionmentioning

confidence: 99%

High Area Efficiency Bidirectional Silicon-Controlled Rectifier for Low-Voltage Electrostatic Discharge Protection

Chen,

Zhao,

Zhou

et al. 2023

Electronics

Self Cite

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Continuously scaling down and decreasing operation voltages of ICs, from the 5 V TTL-compatible voltage to 3.3 V, then 1.2 V, and now 0.8 V for low-power ICs, results in more stringent electrostatic discharge protection design requirements, such as a narrow ESD design window, low operation voltage, and high ESD robustness. Based on traditional diode string and diode-triggered silicon-controlled rectifiers, an enhanced diode-triggered silicon-controlled rectifier is proposed to meet the requirements of low-voltage integrated circuits as bidirectional electrostatic discharge protection. The new device employs an additional PMOS and NMOS in the N-well and P-well, respectively, to offer additional current paths along the surface to significantly enhance its robustness. TCAD simulation shows that the device is triggered by both the diode strings and embedded MOS, making the device turn on faster and the current distribution more uniform during the ON state owing to the additional surface current paths. The proposed new device has excellent dual-directional ESD protection performance with a figure of merit of 4.01 mA/um2, which is about a 71% improvement compared with the conventional diode-triggered silicon-controlled rectifier. It also has higher area efficiency, lower trigger voltage, lower current leakage, and a faster turn-on speed. The proposed enhanced diode-triggered silicon-controlled rectifier is an attractive ESD protection solution for ultra-low-voltage ICs.

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“…such as RS485 bus and RS232 bus. However, the traditional DDSCR structure has a lower breakdown voltage and breakdown current [6][7][8][9]. Under high voltage conditions, the lack of protection capability limits traditional DDSCRs as an ESD protection device for the Bus interface.…”

Section: Introductionmentioning

confidence: 99%

Dual direction SCR with deep well structure for high voltage ESD in communication bus

Wang

Jin

Zheng

et al. 2019

Semicond. Sci. Technol.

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In order to improve the robustness of the ESD of the dual-direction silicon-controlled rectifier, a low doping deep well PB structure is proposed instead of the traditional high doping P+ structure. The ESD stress of the dual-direction SCR devices with deep well structure is discharged from inside and the lattice temperature of the device is low to avoid premature burnout of the device. The deep well PB structure on the surface of the device increases the parasitic resistance of the device and improve the conduction uniformity of the device. As the main conduction path of the device is located in NBL, the PB structure does not have a large influence on the sustain voltage. It is verified in a 0.25 μm BCD process. With equivalent circuit and two-dimensional device simulation, the working mechanism is analyzed. According to the transmission line pulse test results and comparing with the data from traditional dual-direction SCR structure. The device's fault current increases from 5.486 A to 8.13 A which is suitable for communication bus high voltage electrostatic discharge (ESD) protection.

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28 nm CMOS process ESD protection based on diode-triggered silicon controlled rectifier

Cited by 10 publications

References 11 publications

A Novel DTSCR Structure with High Holding Voltage and Enhanced Current Discharge Capability for 28 nm CMOS Technology ESD Protection

A Novel DTSCR Structure with High Holding Voltage and Enhanced Current Discharge Capability for 28 nm CMOS Technology ESD Protection

High Area Efficiency Bidirectional Silicon-Controlled Rectifier for Low-Voltage Electrostatic Discharge Protection

Dual direction SCR with deep well structure for high voltage ESD in communication bus

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