2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) 2014
DOI: 10.1109/isscc.2014.6757511
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27.3 A 210mV 5MHz variation-resilient near-threshold JPEG encoder in 40nm CMOS

Abstract: Operating circuits in the near-threshold region enables large energy savings. However, such circuits also pose many challenges, such as increased delay, unwanted leakage paths and high sensitivity to variations. Working in advanced nanometer CMOS technologies compromises the robustness of circuits even more due to the increased variability. Nonetheless, these technologies offer higher operating frequencies for ultra-low-voltage circuits. Transitioning to smaller technologies is attractive for digital near-thre… Show more

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Cited by 20 publications
(6 citation statements)
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“…The structure of a TG allows to create any logic function with the same generic scheme and layout, making it easy to create a library consisting of lots of cells with different functionalities. The benefits of stacking and differential TG logic (see [4]) more than outweigh their increased design complexity. Signal degradation due to a lack The cell library is characterized in a differential way.…”
Section: Differential Transmission Gate Design Flowmentioning
confidence: 99%
See 1 more Smart Citation
“…The structure of a TG allows to create any logic function with the same generic scheme and layout, making it easy to create a library consisting of lots of cells with different functionalities. The benefits of stacking and differential TG logic (see [4]) more than outweigh their increased design complexity. Signal degradation due to a lack The cell library is characterized in a differential way.…”
Section: Differential Transmission Gate Design Flowmentioning
confidence: 99%
“…Operating the microcontroller at ultra-low voltage can help to meet these strict energy requirements, yet this strategy is plagued by 3 conflicting design challenges: 1) ensuring reliable low voltage operation under the increased variability of advanced nanometer CMOS technologies; 2) maintaining an operating speed >10MHz, necessary to cover a wide range of applications, under ultra-low voltage operation; 3) integrating low voltage variability robust design into a standard cell design flow, avoiding the need for full custom design. Current state-of-theart low-voltage 32-bit microcontrollers fail to combine these 3 aspects, either suffering from sub-MHz operating speed [1]- [3] or needing full custom circuit design to ensure variation resiliency [4].…”
Section: Introductionmentioning
confidence: 99%
“…Currently most energy efficient NT processors have a V DD ranging from 200 to 400 mV. [4]. While lowering the supply voltage a small off current should be maintained.…”
Section: Introductionmentioning
confidence: 99%
“…This enables the design of the high performance processing systems of today, operating at a clock frequency up to a few GHz. Energy efficient IoT nodes run at a clock frequency which is at least a factor of 10 lower: 10 to 100 MHz [3] [4]. Since the delay performance is actually governed by the equation t d =CV dd /I, devices with a current capability of 50 to 100 A/ m are acceptable for the design of IoT nodes.…”
Section: Introductionmentioning
confidence: 99%
“…The MAC was chosen since it is a block that is very frequently used in DSP designs and because it is a complex block that includes feedback. Since the MAC is the critical component of DSP designs, it is also possible to design a processor that achieves similar ultra-lowvoltage characteristics as this MAC with the same design principles [10]. Important to note is that the aim was to design variation-resilient circuits which are able to operate at both very low energy consumptions and n × 10 MHz-speed to increase the industrial relevance of ultra-low-voltage circuits.…”
mentioning
confidence: 99%