23.5 A 0.41mA Quiescent Current, 0.00091% THD+N Class-D Audio Amplifier with Frequency Equalization for PWM-Residual-Aliasing Reduction

Chien, Shih-Hsiung; Kuo, Tai‐Haur; Huang, Hung-Yi; Wang, Hongbin; Qiu, Yi-Zhi

doi:10.1109/isscc19947.2020.9062932

Cited by 3 publications

(6 citation statements)

References 2 publications

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Section: Introductionmentioning

confidence: 99%

“…The closed-loop Class-D amplifiers including 'pulse width modulation (PWM)' suffer from inherent non-linearity [1][2][3][4][5], such that unlike linear amplifiers, the higher loop-order cannot reduce the distortion levels [5]. The high-frequency ripples of the switching signal are resampled in the PWM section which makes PWM-residual-aliasing distortion [1,5]. To cancel this error, several solutions including an additive pulse-train in feedback path [1], the combination of 'sigma-delta (SD)' and PWM techniques with a 17-level voltage quantiser and digital time-quantised PWM [2], and a low-pass filter in feedback path [3] are introduced.…”

Section: Introductionmentioning

confidence: 99%

“…The high-frequency ripples of the switching signal are resampled in the PWM section which makes PWM-residual-aliasing distortion [1,5]. To cancel this error, several solutions including an additive pulse-train in feedback path [1], the combination of 'sigma-delta (SD)' and PWM techniques with a 17-level voltage quantiser and digital time-quantised PWM [2], and a low-pass filter in feedback path [3] are introduced. All these techniques add a challenging calibration circuit [1][2][3] to alleviate the inherent linearity problem of three-level closedloop PWM.…”

Section: Introductionmentioning

confidence: 99%

“…To cancel this error, several solutions including an additive pulse-train in feedback path [1], the combination of 'sigma-delta (SD)' and PWM techniques with a 17-level voltage quantiser and digital time-quantised PWM [2], and a low-pass filter in feedback path [3] are introduced. All these techniques add a challenging calibration circuit [1][2][3] to alleviate the inherent linearity problem of three-level closedloop PWM. Besides, a challenging design of loop-filter is needed to achieve a Power Supply Reject Ratio (PSRR) of better than 100 [3].…”

Section: Introductionmentioning

confidence: 99%

“…The local feedback of the first two integrators (through the gain of ξ ) provides a resonator. According to (1), two zeros of NTF are migrated from origin into the band of interest.…”

Section: Introductionmentioning

confidence: 99%

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Five‐level class‐D amplifier employing fourth‐order continuous‐time sigma‐delta modulator

Pakniat

2021

Electronics Letters

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A new closed‐loop multi‐level Class‐D amplifier employing a fourth‐order ‘continuous‐time sigma‐delta modulator’ is proposed and analysed. The proposed amplifier is intrinsically linear and it has approximately the fixed ‘total harmonic distortion plus noise’ against the input frequency. The corresponding circuit is designed and simulated in 180 nm technology (3.3 V), while the post‐layout model of the power stage is employed. A total harmonic distortion plus noise of 0.0016%, the quiescent current of 2.6 mA, the maximum efficiency of 94%, the average switching frequency of 400∼500 kHz and an excellent ‘power supply reject ration’ of 120 dB are achieved.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

“…The local feedback of the first two integrators (through the gain of ξ ) provides a resonator. According to (1), two zeros of NTF are migrated from origin into the band of interest.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Five‐level class‐D amplifier employing fourth‐order continuous‐time sigma‐delta modulator

Pakniat

2021

Electronics Letters

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A 0.4-mA-Quiescent-Current, 0.00091%-THD+N Class-D Audio Amplifier With Low-Complexity Frequency Equalization for PWM-Residual- Aliasing Reduction

Qiu

Chien

Kuo

2022

IEEE J. Solid-State Circuits

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Active PWM ripple reduction in class-d amplifiers using digital loop filters

Lokin¹

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The research field around sound reproduction is driven by a desire to continuously pack more powerful amplifiers in a small fan-less enclosure while providing state-of-the-art noise and distortion performance. Class-D amplifiers are a perfect candidate for these requirements, specifically because of the inherently low dissipation in their switching power stage with respect to more conventional linear amplifiers. There is, however, always a caveat: switching high currents at high frequencies causes electromagnetic emissions that could interfere with the correct operation of other electronic devices. Regulations limit the amount of electromagnetic interference (EMI) that devices are allowed to emit to maintain interoperability between the many electronic devices in the Internet of things (IoT) era.Speakers are commonly connected to an amplifier using leads of several meters. These leads double as an antenna for high frequency signals above the audio band, such as the switching frequency and its harmonics or parasitic ringing in the output stage, thereby causing unwanted radiated emissions. This thesis is focused on reducing the EMI due to the residual power after the output filter at the pulse-width modulation (PWM) frequency, the so called ripple. Examples in literature reduce the power at the PWM frequency and its harmonics by applying spread spectrum modulation to smear power out over a larger bandwidth. However, in this way they still radiate the same amount of power, just not concentrated at distinct frequencies. To reduce the ripple current through the speaker leads, it is possible to use a higher order filter, use a multi-phase or multi-level output stage or to inject a cancellation signal after the output filter. In the research field of power electronics, cancellation schemes have been presented. First the disturbance is sensed and processed and afterwards a cancellation signal is synthesized and injected into the circuit. The processing can be done using a feedback or feed-forward topology, each having its advantages and disadvantages.An extensive case study on multi-phase systems is done to evaluate their merits in reducing the ripple current after the output filter. In a multiphase system, multiple half-bridges are combined in a parallel fashion to drive one or both sides of the load. Interleaving of the PWM carriers in the modulator corresponding to each half-bridge provides a reduction in the observed ripple current after combining the half bridge outputs in the output filter. The effect of adding more phases on the amount of ripple is vii ix ABSTRACT high-frequency poles.In summary, this thesis has shown a technique to reduce the ripple current after the output filter. Thereby the amount of EMI that can be radiated off the speaker leads decreases. The effect of unit delays in the loop has been mitigated by applying a special filter design method to obtain a more stable system. A prototype has been made around an existing amplifier to show the effectiveness of the proposed feedback ripple reduction so...

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23.5 A 0.41mA Quiescent Current, 0.00091% THD+N Class-D Audio Amplifier with Frequency Equalization for PWM-Residual-Aliasing Reduction

Cited by 3 publications

References 2 publications

Five‐level class‐D amplifier employing fourth‐order continuous‐time sigma‐delta modulator

Five‐level class‐D amplifier employing fourth‐order continuous‐time sigma‐delta modulator

A 0.4-mA-Quiescent-Current, 0.00091%-THD+N Class-D Audio Amplifier With Low-Complexity Frequency Equalization for PWM-Residual- Aliasing Reduction

Active PWM ripple reduction in class-d amplifiers using digital loop filters

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