20-GHz PLL-based configurable frequency generator in 180nm SiGe-on-SOI BiCMOS

Cali, Joseph; Grens, C.M.; Turner, S.E.; Jansen, D.; Kushner, Lawrence J.

doi:10.1109/rfic.2015.7337790

Cited by 7 publications

(1 citation statement)

References 2 publications

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“…For lower noise figure the RF-FPGA can be reconfigured in an LNA first architecture to achieve a NF of 10 dB and an IIP3 of 6 dBm [5]. The onchip frequency generators have a phase noise of -157 dBc/Hz at a 40 MHz offset from a 5.5 GHz reference [6]. Reference 5 illustrates the performance of these sub-blocks over frequency and configuration.…”

Section: Bae'smentioning

confidence: 99%

Reconfigurable Electronics for Adaptive RF Systems

Olsson

Bunch

Christal

2016

2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)

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This paper overviews the Defense Advanced Research Projects Agency (DARPA) Adaptive RF Technologies (ART) and Arrays at Commercial Timescales (ACT) programs. These programs seek to create adaptable and reusable RF hardware in order to lower nonrecurring engineering development costs and timelines for RF systems and to allow RF hardware to be adapted to new missions after fielding. To achieve this vision, new RF architectures more amenable to reconfigurability have been developed along with component technologies that reduce the performance penalty associated with adaptive RF hardware.

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Section: Bae'smentioning

confidence: 99%