2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) 2016
DOI: 10.1109/rfic.2016.7508323
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20–30 GHz mixer-first receiver in 45-nm SOI CMOS

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Cited by 30 publications
(6 citation statements)
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“…To quantify the key system parameters of each block, the typical values of the parameters are summarized in Table 1. The proposed system is designed to operate with a channel bandwidth (B) of 5 GHz, 16-QAM modulated signal (SNR 𝑈 =SNR 𝐶𝑈 of > 18 dB) and 40m-link range to a user equipment receiver with 𝑁 𝐹 𝑟𝑢 =𝑁 𝐹 𝑈𝐿 of 8 dB [15], which yields a path loss 𝐿 𝑃𝑎𝑡 ℎ = 94.0𝑑𝐵 at 30 GHz. The antenna parameters 𝐿 𝐹𝑒 , G 𝐴 are assumed to be 1.9 dB and 4.5 dB, respectively, according to [16], resulting in 𝐿 𝐴𝐸 of 88.8 dB.…”
Section: System Designmentioning
confidence: 99%
“…To quantify the key system parameters of each block, the typical values of the parameters are summarized in Table 1. The proposed system is designed to operate with a channel bandwidth (B) of 5 GHz, 16-QAM modulated signal (SNR 𝑈 =SNR 𝐶𝑈 of > 18 dB) and 40m-link range to a user equipment receiver with 𝑁 𝐹 𝑟𝑢 =𝑁 𝐹 𝑈𝐿 of 8 dB [15], which yields a path loss 𝐿 𝑃𝑎𝑡 ℎ = 94.0𝑑𝐵 at 30 GHz. The antenna parameters 𝐿 𝐹𝑒 , G 𝐴 are assumed to be 1.9 dB and 4.5 dB, respectively, according to [16], resulting in 𝐿 𝐴𝐸 of 88.8 dB.…”
Section: System Designmentioning
confidence: 99%
“…Generating NOP for beyond 10 GHz operation would require frequency dividers operating >20 GHz, leading to increased power for LO generation. Technology scaling to 45 nm RFSOI, series inductor to resonate input capacitance, use of small mixer switch sizes, and a LO scheme relying on passive quadrature generation followed by transmission gates to generate ∼25 % duty-cycle waveforms are used in [61] to demonstrate a 4-phase mixer-first RX operating from 20 GHz to 30 GHz with 8 dB NF and 41 mW power consumption(Fig. 19).…”
Section: Reconfigurable Receivers At Rf and Mm-wavementioning
confidence: 99%
“…FIGURE19. 20 GHz mixer-first architecture in[61] extends N-path operation to mm-wave in 45 nm CMOS RFSOI by using small mixer switch sizes and LO generation using tranmission gates and 50%-duty cycle quadrature LO.…”
mentioning
confidence: 99%
“…The dynamic power consumption is due to the clock buffers driving the mixer switches, while the static power consumption is due to the radio frequency (RF) low noise amplifier (LNA) [8]- [11] and the baseband (BB) trans-impedance amplifier (TIA). In recent years, [12]- [39] have employed a passive mixer as the first block of the receiver instead of an LNA. Mixer-first receivers [12]- [39] offer many advantages over traditional LNA-first receiver architectures [1]- [3], [5], [6], making them suitable for nextgeneration software-defined radios (SDRs).…”
Section: Introductionmentioning
confidence: 99%
“…In recent years, [12]- [39] have employed a passive mixer as the first block of the receiver instead of an LNA. Mixer-first receivers [12]- [39] offer many advantages over traditional LNA-first receiver architectures [1]- [3], [5], [6], making them suitable for nextgeneration software-defined radios (SDRs). Some of these advantages include frequency tunability, high linearity, and blocker resilience.…”
Section: Introductionmentioning
confidence: 99%