2007 IEEE International Electron Devices Meeting 2007
DOI: 10.1109/iedm.2007.4419061
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2-stack 1D-1R Cross-point Structure with Oxide Diodes as Switch Elements for High Density Resistance RAM Applications

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Cited by 187 publications
(89 citation statements)
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“…In larger crossbars, the greater number of sneak paths makes it even more difficult to distinguish between the stored values. Various techniques have been proposed to reduce the sneak path effect, including multistage reading, diode gating, and transistor gating [22,[27][28][29]. In this paper, we focus on the row grounding technique, where unselected rows are grounded, as shown in Figure 2.…”
Section: Sneak Path In a Memristive Crossbar Arraymentioning
confidence: 99%
“…In larger crossbars, the greater number of sneak paths makes it even more difficult to distinguish between the stored values. Various techniques have been proposed to reduce the sneak path effect, including multistage reading, diode gating, and transistor gating [22,[27][28][29]. In this paper, we focus on the row grounding technique, where unselected rows are grounded, as shown in Figure 2.…”
Section: Sneak Path In a Memristive Crossbar Arraymentioning
confidence: 99%
“…6b) at each resistively switching cell, depending on the resisting properties and the array size. Samsung Company already demonstrated a "non-CMOS" solution with a two-layer architecture based on 1D/1R memory cells associating a diode with a nickel oxide-based resistive element exhibiting unipolar switching [35]. Such a crossbar memory matrix was easily designed with the help of BL and WL to access each cell individually.…”
Section: Phase Change Memories Pcmmentioning
confidence: 99%
“…Two-terminal RRAM structure allow its integration in crossbar arrays, by accessing each memory cell through the selection of a word-line and a bit-line. 1,4 Small device size of 4F 2 and the availability of 3-D architecture solutions in a crossbar array, 10 make RRAM a promising competitor of flash NAND device. On the contrary, select device, used to avert the sneak-path current of unselected cells in low resistance state (LRS), is one of the main challenge for getting high-density RRAM crossbar arrays.…”
Section: Introductionmentioning
confidence: 99%
“…On the contrary, select device, used to avert the sneak-path current of unselected cells in low resistance state (LRS), is one of the main challenge for getting high-density RRAM crossbar arrays. 4,11 To resolve this concern, several approaches like, threshold switches, 12 oxide diodes, 4 and self-rectifying RRAM 13 have been proposed. Recently, complementary resistive switch was attracted renewed interest for coding the logic bit in two different reset (high resistance) states to resolve the sneak-path issue, without using any select devices.…”
Section: Introductionmentioning
confidence: 99%
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