2 Gbit/s timing recovery circuit using dielectric resonator filter

Silicon Clock Recovery IC's for 2 to 3.5 Gbit/s

“…The frequency range (10 Hz to 4 MHz) of the ac voltmeter employed for this measurement fully covered the expected jitter spectrum: This spectrum extends, roughly, from de to fc/(2 Q) . The measured rms jitter of 0.3°ranks among the lowest values reported so far for a CR circuit at a comparable bit rate [4], [5]. The Table summarizes chip parameters and meas¬ ured performance data.…”

“…The dynamic clock phase jitter as an important performance parameter of a CR circuit was evaluated by a measuring set-up as reported in [4]. The measured rms phase jitter of the extracted clock is less than 0.3°if a pn pattern is applied at the input ( pn sequence of 2^°1 ).…”

“…GaAs clock and data recovery components for 2.4 Gbit/s data rate [3]), in the second, by a high-Q passive filter (cf. [4], [5]). The circuit presented here is of the second category.…”