2-gb/s CMOS optical integrated receiver with a spatially Modulated photodetector

Jutzi, M.; Grözing, Markus; Gaugler, E.; Mazioschek, W.; Berroth, Manfred

doi:10.1109/lpt.2005.846563

Cited by 37 publications

(16 citation statements)

References 9 publications

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“…Two MSM photodetectors are all the same. One generates photo currents for the differential TIA, while another dummy MSM photodetector could boost the bandwidth of the optical receiver [9]. The fully differential TIA converts photo current into differential voltage, and three stage limiting amplifiers further increase the voltage signal swing.…”

Section: The Front-end Circuit Of the Receivermentioning

confidence: 99%

A 2 Gb/s optical receiver with monolithically integrated MSM photodetector in standard CMOS process

et al. 2011

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A monolithically standard complementary-metal-oxide-semiconductor (CMOS) optical receiver with a metal-semiconductormetal (MSM) photodetector is presented in this paper. An active-feedback transimpedance amplifier (TIA) with negative Miller capacitance is used to increase the bandwidth of the receiver. The MSM photodetector with high responsivity provides higher sensitivity for the optical receiver. The optical receiver implemented in chartered 0.35 μm process achieves a 1.7 GHz bandwidth due to the low capacitance of the MSM photodetector. 2 Gb/s optical data are successfully transmitted with a bit-error rate of 10 -9 at an optical power of -15 dBm. The power consumption of the receiver is 94 mW under a single 3.3 V supply. Communication systems have always been the subject of a lot of researches. Today however, the transmission of data is becoming the performance limiting action. To enhance the performance of the communication, an optical communication system is researched to solve problems in present communication system. Nowadays, the research of optical receiver has got much progress [1,2]. In recent years, a lot of researches of hybrid integration optical receiver were reported [3,4]. Because the cost of packaging and fabricating are reduced greatly in standard CMOS process, much more attention of optical receiver has been attached to the research of monolithically integrated CMOS optical receivers for low cost. For example, an 1 Gb/s optical receiver with a -6 dBm sensitivity for λ=850 nm in 0.35 μm standard CMOS process was first reported by Bell laboratory [5]. Nevertheless, the sensitivity of the silicon-based, standard CMOS optical receiver is still a bit low because of the disadvantage of silicon material. Therefore the low responsivity problem of silicon detector is to need solution urgently. In order to solve this problem, some *Corresponding author (email: xxd@tju.edu.cn) researches of high responsive MSM photodetector were reported. Li realized a MSM photodetector with the responsivity of 0.118 A/W in Si-based process [6]. Robert reported a MSM polysilicon photodiode with 0.35 A/W responsivity in 0.35 μm CMOS process [7].In this paper, a monolithically integrated optical receiver with a MSM photodetector is presented. Generally, the sensitivity of the receiver could be improved by increasing the responsivity of the photodetector. In order to solve the problem of the low responsivity, a MSM photodetector is adopted in this optical receiver. Since Schottky diode is a major-carrier device, a MSM photodetector based Schottky diode has higher responsivity and better frequency characteristic. Besides all, the MSM photodetector has an advantage of low capacitance per unit area. In addition, an active-feedback TIA is adopted in the receiver in order to improve the bandwidth of the receiver. The design of the MSM photodetector in standard CMOS processA MSM photodetector integrated in standard CMOS

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Section: The Front-end Circuit Of the Receivermentioning

confidence: 99%

A 2 Gb/s optical receiver with monolithically integrated MSM photodetector in standard CMOS process

et al. 2011

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“…The next block is a limiting amplifier (LIA) to boost the signal swing. It is a cascade of multi stages of low-gain, high-bandwidth differential amplifier that is usually exploited in conventional differential optical receivers [3] and not presented here.…”

Section: Circuit Designmentioning

confidence: 99%

“…Though much progress has been made recently Figure 1 Block diagram of a conventional differential optical receiver analog front-end. [1][2][3], their performances still do not satisfy the requirements of high-speed communications, especially the optical sensitivity. This is due to the limited low responsivity of photodetectors in today's mainstream CMOS technologies, as well as the disadvantages of the traditional high-speed optical receiver configuration which this work tries to realize and overcome.…”

Section: Introductionmentioning

confidence: 99%

A fully differential transimpedance amplifier with integrated differential photodetector in standard CMOS process for optical communications and interconnects

Mao

Xiao

et al. 2010

Sci. China Inf. Sci.

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A fully differential transimpedance amplifier (TIA) with integrated differential photodetector in standard CMOS technologies has been realized for optical receivers in optical communications and optical interconnects. And a novel, fully differential photodetector aiming to convert the incident light into a pair of fully differential photo-generated currents and ensure the differential symmetry on circuit configuration and model has also been proposed for the differential TIA to achieve the fully differential characteristic. Theoretical analysis and simulation results both indicate that the fully differential TIA reaches a higher bandwidth than a conventional one and at the same time a doubled sensitivity. Based on this new TIA, a monolithic, fully differential optoelectronic integrated receiver was designed and implemented in a Chartered 3.3 V, 0.35 µm standard CMOS process. It demonstrates 98.75 dBΩ transimpedance gain, and 0.334 µA equivalent input integrated referred noise current from 1 Hz up to −3 dB frequency. The power dissipation from a single 3.3 V supply is 100 mW for the TIA-LIA (limiting amplifier)-combination plus 138 mW for the 50 Ω output buffer. At 850 nm wavelength, the optical receiver achieves a 1.1 GHz 3 dB bandwidth, and can handle bitrates up to 1.6 Gbit/s for −12.2 dBm peak-peak optical power and 2 31 −1 PRBS (pseudorandom bit sequency) input signal.

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“…For short-distance optical communications such as optical access networks and optical interconnects, CMOS compatible photodetectors (CMOS-PDs) have been widely investigated to enable cost-effective implementation of large-capacity data transmission systems [1][2][3][4][5][6][7][8]. CMOS technology provides not only low-cost and highvolume fabrication but also a single chip solution for optical receivers with well developed CMOS circuits.…”

Section: Introductionmentioning

confidence: 99%

“…Spatially modulated PDs, in which slow diffusion currents are eliminated with differential signaling, were implemented. However, they still have problems of low responsivity and limited speed caused by a large area [5]. Recently, p+-p-n avalanche structure has been reported that provides high-speed and high-responsivity [6].…”

Section: Introductionmentioning

confidence: 99%

6.25-Gb/s Optical Receiver Using A CMOS-Compatible Si Avalanche Photodetector

Kang¹,

Lee²,

Choi³

2008

Journal of the Optical Society of Korea

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2-gb/s CMOS optical integrated receiver with a spatially Modulated photodetector

Cited by 37 publications

References 9 publications

A 2 Gb/s optical receiver with monolithically integrated MSM photodetector in standard CMOS process

A 2 Gb/s optical receiver with monolithically integrated MSM photodetector in standard CMOS process

A fully differential transimpedance amplifier with integrated differential photodetector in standard CMOS process for optical communications and interconnects

6.25-Gb/s Optical Receiver Using A CMOS-Compatible Si Avalanche Photodetector

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