2.44-GFLOPS 300-MHz floating-point vector-processing unit for high-performance 3D graphics computing

Ide, N.; Hirano, M.; Endo, Yukio; Yoshioka, Shinichi; Murakami, Hiroaki; Kunimatsu, Atsushi; Sato, Toshinori; Kamei, T.; Okada, Tomoyuki; Suzuoki, M.

doi:10.1109/4.848212

Cited by 39 publications

(16 citation statements)

References 7 publications

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“…Inverse square root function is widely used in 3D graphics especially in lightning reflections [9,10,11]. Many algorithms can be used to approximate inverse square root functions [12,13,14,15,16].…”

Section: Introductionmentioning

confidence: 99%

Fast calculation of inverse square root with the use of magic constant – analytical approach

Moroz

Walczyk

Hrynchyshyn

et al. 2018

Applied Mathematics and Computation

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Section: Introductionmentioning

confidence: 99%

Fast calculation of inverse square root with the use of magic constant – analytical approach

Moroz

Walczyk

Hrynchyshyn

et al. 2018

Applied Mathematics and Computation

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“…A similar engine has been proposed by Ide et al. 3 It is a VLIW processor that consists mainly of a vector unit with four floating-point Multiply-and-Accumulate units and one floating-point division and square-root unit. Aside of building graphics processors, there is the approach of augmenting the instruction set of a general-purpose processor with instructions 3D graphics.…”

Section: Introductionmentioning

confidence: 99%

Software-based geometry operations for 3D computer graphics

Sima

Iancu²,

Glossner

et al. 2006

SPIE Proceedings

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In order to support a broad dynamic range and a high degree of precision, many of 3D renderings fundamental algorithms have been traditionally performed in floating-point. However, fixed-point data representation is preferable over floatingpoint representation in graphics applications on embedded devices where performance is of paramount importance, while the dynamic range and precision requirements are limited due to the small display sizes (current PDA's are 640 × 480 (VGA), while cell-phones are even smaller). In this paper we analyze the efficiency of a CORDIC-augmented Sandbridge processor when implementing a vertex processor in software using fixed-point arithmetic. A CORDIC-based solution for vertex processing exhibits a number of advantages over classical Multiply-and-Acumulate solutions. First, since a single primitive is used to describe the computation, the code can easily be vectorized and multithreaded, and thus fits the major Sandbridge architectural features. Second, since a CORDIC iteration consists of only a shift operation followed by an addition, the computation may be deeply pipelined. Initially, we outline the Sandbridge architecture extension which encompasses a CORDIC functional unit and the associated instructions. Then, we consider rigid-body rotation, lighting, exponentiation, vector normalization, and perspective division (which are some of the most important data-intensive 3D graphics kernels) and propose a scheme to implement them on the CORDIC-augmented Sandbridge processor. Preliminary results indicate that the performance improvement within the extended instruction set ranges from 3× to 10× (with the exception of rigid body rotation).

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“…These applications include scientific computing, computer graphics, 3D graphics applications and computer aided design (CAD) [1][2][3][4]. Although software routines can approximate elementary functions accurately, they are often too slow for numerically intensive and real-time applications.…”

Section: Introductionmentioning

confidence: 99%

Optimized Linear, Quadratic and Cubic Interpolators for Elementary Function Hardware Implementations

2016

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This paper presents a method for designing linear, quadratic and cubic interpolators that compute elementary functions using truncated multipliers, squarers and cubers. Initial coefficient values are obtained using a Chebyshev series approximation. A direct search algorithm is then used to optimize the quantized coefficient values to meet a user-specified error constraint. The algorithm minimizes coefficient lengths to reduce lookup table requirements, maximizes the number of truncated columns to reduce the area, delay and power of the arithmetic units, and minimizes the maximum absolute error of the interpolator output. The method can be used to design interpolators to approximate any function to a user-specified accuracy, up to and beyond 53-bits of precision (e.g., IEEE double precision significand). Linear, quadratic and cubic interpolator designs that approximate reciprocal, square root, reciprocal square root and sine are presented and analyzed. Area, delay and power estimates are given for 16, 24 and 32-bit interpolators that compute the reciprocal function, targeting a 65 nm CMOS technology from IBM. Results indicate the proposed method uses smaller arithmetic units and has reduced lookup table sizes compared to previously proposed methods. The method can be used to optimize coefficients in other systems while accounting for coefficient quantization as well as truncation and rounding effects of multiple arithmetic units.

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2.44-GFLOPS 300-MHz floating-point vector-processing unit for high-performance 3D graphics computing

Cited by 39 publications

References 7 publications

Fast calculation of inverse square root with the use of magic constant – analytical approach

Fast calculation of inverse square root with the use of magic constant – analytical approach

Software-based geometry operations for 3D computer graphics

Optimized Linear, Quadratic and Cubic Interpolators for Elementary Function Hardware Implementations

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