2.1 An integrated 0.56THz frequency synthesizer with 21GHz locking range and −74dBc/Hz phase noise at 1MHz offset in 65nm CMOS

Abstract

Spectra from 0.5 to 0.6THz play critical roles in planetary science, astrophysics and radio-astronomy as various chemical species including water, nitrates (NO 2 , N 2 O, NH 3 ) and organics (CH 4 and HCN) can either absorb or reflect radiation in this frequency regime. Accordingly, NASA and ESA have developed a wide range of spectroscopic sounding instruments to investigate our solar system. Current LO chains for spectroscopic receivers are implemented with discrete III-V devices and heavy waveguide assemblies. For instance, the 600GHz NASA PIS-SARRO spectrometer for Europa begins with a 33GHz PLL, tripled to 100GHz, doubled to 200GHz, and then tripled again to 600GHz via multiple waveguides. This LO chain occupies over 3000cm 3 , weighs 2.5kg, and consumes 11.5W of DC power.Frequency synthesizers around 0.3THz demonstrated in SiGe HBTs confirmed the potential of implementing a terahertz LO in IC technologies [1,2]. It would be beneficial to further develop frequency synthesizers at the scientifically important 0.5-to-0.6THz in mainstream CMOS technologies with larger integration and lower power than that of SiGe HBT counterparts. Although VCOs/multipliers [3][4][5][6] have been developed at these frequencies, the realization of wide-bandwidth and low-phase-noise synthesizers remains challenging due to the following obstacles: (a) the use of varactors or other passives for frequency tuning radically lowers the tank quality and inhibits oscillation; (b) there is no proven injection-locked frequency divider (ILFD) that can operate beyond 0.2THz with a sufficiently wide frequency locking range. To date, no silicon based synthesizer has been reported beyond 0.32THz.We report realization of a 0.54-to-0.56THz synthesizer ( Fig. 2.1.1) in a standard 65nm CMOS technology. Its front-end is composed of a primary triple-push Colpitts oscillator (P-TPCO), an auxiliary TPCO (A-TPCO), a single-ended Colpitts oscillator (SECO), a 1 st ILFD, and a 2 nd wide band ILFD, followed by a divide-by-16 static-frequency-divider chain. The P-TPCO delivers its 3 rd harmonic for the intended LO at 0.56THz, while the A-TPCO and the subsequent Colpitts oscillator (CO) bridge it to the 1 st IFDL. It is nevertheless impossible to exploit ILFD directly at 0.56THz. We thus use 1 st ILFD to divide the P-TPCO 186.7GHz fundamental frequency to 93.3GHz, and use the 2 nd ILFD and the subsequent divider chain for further divisions in the PLL feedback loop. To eliminate noise from the charge pump and multi-modulus dividers (MMD), the PLL uses a sub-sampled phase detector (SSPD) [7], followed by a Gm cell, which converts the phase error to current that charges an off-chip loop filter and supplies TPCO control voltage, V CTL . An auxiliary frequency-locked loop with a conventional MMD, a phase-frequency detector (PFD) and a charge pump (CP) conducts an automatic frequency search before enabling the SSPD to lock to the precise phase. A 3-wire digital serial peripheral interface (SPI) is used to control the tuning-knob DACs throughout the synthesizer.Both...

29.6 A 660-to-676GHz 4×2 Oscillator-Radiator Array with Intrinsic Frequency-Filtering Feedback for Harmonic Power Boost Achieving 7.4dBm EIRP in 40nm CMOS

“…The EIRP is also one of the best of the compared CMOS sources and similar to SiGe sources. Furthermore, the chip achieves state-of-the-art out-of-band phase noise performance even when compared to lower frequency counterparts like [4] and [5]. In summary, by using the proposed technique of boosting the tank harmonic resonance through a frequency-filtering feedback network, this work advances the current state-of-the-art of THz CMOS sources to a frequency range above 650GHz.…”

A 167‐to‐172 GHz 65‐nm CMOS body‐voltage‐tuned harmonic‐mode voltage‐controlled oscillator

“…Another potential topology is a push‐push Colpitts oscillator, which generates the 2nd‐order harmonic frequency of the core VCO. The fundamental frequency may be further reduced by extending the push‐push Colpitts VCOs to coupled‐push oscillators . However, as the number of coupled oscillators increases, the unwanted oscillation modes also ramp up, which results in the wanted mode becoming overpowered.…”

645‐GHz InP heterojunction bipolar transistor harmonic oscillator

“…One of the major challenges in developing integrated THz systems is the on-chip generation of high frequency signals. Owing to the continuous advances in semiconductor technologies based on both scaling and material innovation, the frequency of on-chip signal sources has kept increasing and recently exceeded 500 GHz with numerous harmonic techniques [1][2][3][4]. Continuing on this effort, a harmonic oscillator operating up to 645 GHz has been developed in this work with a 250-nm InP heterojunction bipolar transistor technology (HBT) technology.…”