1F-1T Array: Current Limiting Transistor Cascoded FeFET Memory Array for Variation Tolerant Vector-Matrix Multiplication Operation

Sk, Masud Rana; Thunder, Sunanda; Müller, F.; Laleni, Nellie; Raffel, Yannick; Lederer, Maximilian; Pirro, L.; Chohan, Talha; Hsuen, Jing-Hua; Wu, Tian-Li; Seidel, Konrad; Kämpfe, Thomas; De, Sourav; Chakrabarti, Bhaswar

doi:10.1109/tnano.2023.3295093

Cited by 6 publications

(2 citation statements)

References 51 publications

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“…[ 9,24,35–40 ] Although several methods have been investigated to improve the device variations and other nonidealities in FeFETs, it is one of the most vexing research topics in FeFETs to date. [ 41–46 ]…”

Section: Introductionmentioning

confidence: 99%

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Ferroelectric Field Effect Transistors–Based Content‐Addressable Storage‐Class Memory: A Study on the Impact of Device Variation and High‐Temperature Compatibility

Sunil,

Rana SK,

Lederer

et al. 2024

Advanced Intelligent Systems

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Hafnium oxide (HfO2)‐based ferroelectric field effect transistors (FeFETs) revolutionize the emerging nonvolatile memory area, especially with the potential to replace flash memories for several applications. In this article, the suitability of FeFET memories is investigated, especially FeFET‐based content addressable memory (CAM) cells, as storage‐class memory under junction temperature variations. FeFETs with silicon oxynitride interfacial layer are fabricated and characterized at various temperatures, varying from room temperature to 120 °C. Although the memory window, numbers of programmable states, and endurance deteriorate at high temperatures, FeFETs show excellent robustness in data retention, write latency, and read stability at all temperatures, especially for binary operation. Finally, system‐level simulations using a Simulation Program with Integrated Circuit Emphasis software using experimental data are conducted to gauge the robustness of the data‐search operation using the CAM array under different temperatures. Despite temperature‐variation‐induced changes in FeFET devices, it is observed that binary CAM cells perform robust and unerring search operations for storing and searching data at temperatures up to 120 °C.

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Section: Introductionmentioning

confidence: 99%

“…The cascode transistor is used to control the variation by limiting the ON current ( I ON ), ensuring robustness. [ 46,52,53 ]…”

Section: Introductionmentioning

confidence: 99%

Ferroelectric Field Effect Transistors–Based Content‐Addressable Storage‐Class Memory: A Study on the Impact of Device Variation and High‐Temperature Compatibility

Sunil,

Rana SK,

Lederer

et al. 2024

Advanced Intelligent Systems

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An experimental comparison of interface trap density in hafnium oxide-based FeFETs

Woo,

Raffel,

Olivo

et al. 2023

Memories - Materials, Devices, Circuits and Systems

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Perspective Roadmap of Advanced HfO₂-based Ferroelectric Field Effect Transistors

De,

Cho,

Ali

et al. 2024

2024 8th IEEE Electron Devices Technology &Amp;amp; Manufacturing Conference (EDTM)

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1F-1T Array: Current Limiting Transistor Cascoded FeFET Memory Array for Variation Tolerant Vector-Matrix Multiplication Operation

Cited by 6 publications

References 51 publications

Ferroelectric Field Effect Transistors–Based Content‐Addressable Storage‐Class Memory: A Study on the Impact of Device Variation and High‐Temperature Compatibility

Ferroelectric Field Effect Transistors–Based Content‐Addressable Storage‐Class Memory: A Study on the Impact of Device Variation and High‐Temperature Compatibility

An experimental comparison of interface trap density in hafnium oxide-based FeFETs

Perspective Roadmap of Advanced HfO₂-based Ferroelectric Field Effect Transistors

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1F-1T Array: Current Limiting Transistor Cascoded FeFET Memory Array for Variation Tolerant Vector-Matrix Multiplication Operation

Cited by 6 publications

References 51 publications

Ferroelectric Field Effect Transistors–Based Content‐Addressable Storage‐Class Memory: A Study on the Impact of Device Variation and High‐Temperature Compatibility

Ferroelectric Field Effect Transistors–Based Content‐Addressable Storage‐Class Memory: A Study on the Impact of Device Variation and High‐Temperature Compatibility

An experimental comparison of interface trap density in hafnium oxide-based FeFETs

Perspective Roadmap of Advanced HfO2-based Ferroelectric Field Effect Transistors

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Product

Resources

About

Perspective Roadmap of Advanced HfO₂-based Ferroelectric Field Effect Transistors