16Mb Split Gate Flash Memory with Improved Process Window

Yater, J.A.; Suhail, M.; Kang, Sung-Taeg; Shen, Juan; Hong, Cheong Min; Merchant, T.; Rao, R. A.; Gasquet, H.; Loiko, K.; Winstead, B.; Williams, S. B.; Rossow, M.; Malloch, W.; Syzdek, R.; Chindalore, G.

doi:10.1109/imw.2009.5090570

Cited by 4 publications

(3 citation statements)

References 1 publication

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“…This may indicate that the technological convergence point lies in the split-gate, charge-trapping cell structure in the future. The advantage of this choice has been proved by the implementation in the CMOS logic platforms at 90nm [6], [7] .…”

Section: Evolution Of Embedded Flash Technologymentioning

confidence: 99%

Evolution of embedded flash memory technology for MCU

Hidaka

2011

2011 IEEE International Conference on IC Design &Amp; Technology

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Embedded flash memory technology has undergone tremendous growth of demands with various performance requirements driven by expanded applications of MCU (Micro Controller Unit) products. High temperature operations with highest reliability for auto-motive applications, very low power embedded EEPROM functions for smart-cards, and ultra low-voltage operations for medical applications are driving factors in developing embedded flash technologies. Together with evolving memory cell technology, resolving performance/power trade-offs by developing dedicated design platforms with optimized eFlash technology, memory interface & bus designs, and the whole chip design methodologies, has realized advanced MCU products line-ups by split-gate MONOS flash technology with a wide range of applied products including auto-motive and security applications. Index Terms-embedded flash memory, split-gate flash memory cell, charge-trapping flash memory cell Embedded Flash Memory -innovation by overall cost reduction CPU RAM Periph.

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Section: Evolution Of Embedded Flash Technologymentioning

confidence: 99%

Evolution of embedded flash memory technology for MCU

Hidaka

2011

2011 IEEE International Conference on IC Design &Amp; Technology

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“…It has been shown that optimized chemical vapor deposition (CVD) process results in partially self-organized nucleation and growth of Si-NCs [5], mitigating the impact of fluctuations on memory array characteristics. Finally, thanks to the use of a single poly-Si, Si-NC memories require a simple and low cost device fabrication process, which makes them of particular interesting for embedded memory applications [6,7,8]. Recent works have demonstrated the discrete storage node concept on a 32 Mb Si-NC NOR Flash memory product, fabricated in a 130 nm ATMEL technology platform [6].…”

Section: Research On Advanced Charge Storage Memoriesmentioning

confidence: 99%

Advanced Charge Storage Memories: From Silicon Nanocrystals to Molecular Devices

et al. 2009

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In this paper, we will make a general overview of different technological approaches suitable for charge storage memories. Several solutions to extend the floating gate Flash memory technology to the 22nm nodes and beyond, are presented. In particular, new modules (discrete traps memories, and more specifically silicon nanocrystal memories), new materials (as high-k materials for the interpoly layer) and innovative architectures (as FinFlash memories) are discussed. Moreover, hybrid approaches which make use of organic molecules as storage sites will be also introduced. Finally, the main theoretical limits of ultra-scaled charge storage memories (i.e. reliability issues linked to few electron phenomena) will be analyzed, opening the path to the introduction of disruptive technologies based on new storage mechanisms (as Phase-Change Memories and Oxide resistive RAMs).

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“…This new memory can perhaps take the form of memory that utilizes a discrete charge trap concept using nanocrystals (NCs) [1][2][3] or nitride [4,5]. Among them, NC technology has approached its product stage in the near-term by Freescale [6]. In addition to the associated scaling issue, many efforts have been made toward a simultaneous enhancement of performance and reliability.…”

Section: Introductionmentioning

confidence: 99%

A study of the memory effects of metallic core–metal oxide shell nanocrystals by a micelle dipping technique

et al. 2010

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With a simple and conformal metal nanocrystal dipping of synthesized micelles, nonvolatile memory characteristics originating from a metallic cobalt (Co) core nanocrystal (NC) surrounded by a Co-oxide shell are investigated in this study. From transmission electron microscopy (TEM) and x-ray photoelectron spectroscopy (XPS), it was confirmed that Co-oxide was made by oxygen plasma for polymer oxidation and that metallic Co wrapped with a Co-oxide shell was made by hydrogen annealing in order to reduce the Co-oxide. Energy band diagrams considering the extent of the coexistent metallic Co/Co-oxide were also analyzed in terms of how they correspond to each program/erase/retention case. These cases were verified by electrically measured data. These results can provide a guideline for the design and optimization of metal NC embedded memory.

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16Mb Split Gate Flash Memory with Improved Process Window

Cited by 4 publications

References 1 publication

Evolution of embedded flash memory technology for MCU

Evolution of embedded flash memory technology for MCU

Advanced Charge Storage Memories: From Silicon Nanocrystals to Molecular Devices

A study of the memory effects of metallic core–metal oxide shell nanocrystals by a micelle dipping technique

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