14nm FinFET technology for analog and RF applications

Singh, Joginder; Bousquet, A.; Ciavatti, J.; Sundaram, K.; Wong, Jason; Chew, Kok Wai; Bandyopadhyay, Anirban; Li, S.; Bellaouar, A.; Pandey, Shesh Mani; Zhu, B.; Martin, Andrew J.; Kyono, C. S.; Goo, Jung-Suk; Yang, Ha-Young; Mehta, Ankit Nalin; Zhang, X.; Hu, Owen; Mahajan, S.; Geiss, Erik; Yamaguchi, Shimpei; Mittal, S.; Asra, Ram; Balasubramaniam, P.; Watts, J.; Harame, D.L.; Todi, Ravi M.; Samavedam, S.; Sohn, Dong Kyun

doi:10.23919/vlsit.2017.7998154

Cited by 34 publications

(4 citation statements)

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“…Z. Huang, H. Zhang, K. Imura and W. Wang are with MaxLinear Inc., Carlsbad, California 92008, USA. of regulators and converters for various power rails, WiFi, and mobile transceiver units [16][17][18]. Notably, at the 22 nm technology node, planar RF laterally diffused metal-oxide-semiconductor (LDMOS) devices based on fully depleted silicon-on-insulator (FDSOI) show promising results, especially in the Internet of Things (IoT) and SoC applications [19].…”

Section: Introductionmentioning

confidence: 99%

Small-Signal and Large-Signal RF Characterization and Modeling of Low and High Voltage FinFETs for 14/16 nm Technology Node SoCs

Kar,

Parihar,

Huang

et al. 2024

IEEE J. Electron Devices Soc.

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Modern System-on-Chip (SoC) architectures necessitate low-voltage (LV) core transistors featuring excellent digital, analog, and radio frequency (RF) properties, as well as thick oxide transistors serving as robust I/O buffers and high-voltage (HV) transistors essential for efficient power management. This study presents a comprehensive DC to RF characterization, a detailed modeling strategy, and subsequent model parameter extraction for commercially produced LV and HV Fin Field Effect Transistors (FinFETs) at 14/16 nm technology. The industry-standard BSIM-CMG compact model is modified to accurately capture the characteristics of the HV FinFET devices integrated with the digital LV FinFETs for SoC applications. A detailed analysis of the DC, analog, and RF performance of LV, I/O, and HV FinFETs compared to the contemporary planar CMOS technology is performed. The large-signal performance of the device is evaluated using the developed model and validated with the measured data. Finally, a concise overview of the performance indicators associated with the modeled device is also presented.

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Section: Introductionmentioning

confidence: 99%

Small-Signal and Large-Signal RF Characterization and Modeling of Low and High Voltage FinFETs for 14/16 nm Technology Node SoCs

Kar,

Parihar,

Huang

et al. 2024

IEEE J. Electron Devices Soc.

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“…At device level, several researchers have focused on the integration of high-k materials as a gate-dielectric or spacers [ 8 , 9 , 10 , 11 , 12 , 13 , 14 ]. Dual-k spacer double gate structure has been reported by [ 8 ] to control direct source to drain tunneling (DSDT) with improved SCEs.…”

Section: Introductionmentioning

confidence: 99%

“…A detailed capacitive analysis of symmetric and asymmetric Dual-k FinFETs for improved circuit delay metrics can be found in [ 13 ]. Singh et al have highlighted a 14nm Analog and RF technology based on a logic FinFET platform for the first time and explored the direct impact of spacer engineering for RF/analog performance [ 14 ]. This paper presents a comprehensive study on 3D trigate FinFET to understand the effect of different asymmetric Dual-k spacers respectively and the asymmetric drain extension.…”

Section: Introductionmentioning

confidence: 99%

Asymmetric Drain Extension Dual-kk Trigate Underlap FinFET Based on RF/Analog Circuit

et al. 2017

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Among multi-gate field effect transistor (FET) structures, FinFET has better short channel control and ease of manufacturability when compared to other conventional bulk devices. The radio frequency (RF) performance of FinFET is affected by gate-controlled parameters such as transconductance, output conductance, and total gate capacitance. In recent years, high-k spacer dielectric materials for manufacturing nanoscale devices are being widely explored because of their better electrostatic control and being less affected by short channel effects (SCEs). In this paper, we aim to explore the potential benefits of using different Dual-k spacers on source and drain, respectively: (AsymD-kk) trigate FinFET structure to improve the analog/RF figure of merit (FOM) for low-power operation at 14 nm gate length. It has been observed from the results that the AsymD-kk FinFET structure improves the coupling of the gate fringe field to the underlap region towards the source and drain side, improving the transconductance (gm) and output conductance (gds) at the cost of an increase in Miller capacitance. Furthermore, to reduce the drain field influence on the channel region, we also studied the effect of asymmetric drain extension length on a Dual-kk FinFET structure. It can be observed that the new asymmetric drain extension structures significantly improve the cutoff frequency (fT) and maximum oscillation frequency (fmax) given the significant reduction of inner fringe capacitance towards drain side due to the shifting of the drain extension’s doping concentration away from the gate edge. Therefore, the asymmetric drain extension Dual-kk trigate FinFET (AsymD-kkDE) is a new structure that combines different Dual-k spacers on the source and drain and asymmetric drain extension on a single silicon on insulator (SOI) platform to enhance the almost all analog/RF FOM. The proposed structure is verified by technology computer-aided design (TCAD) simulations with varying device physical parameters such as fin height, fin width, aspect ratio, spacer width, spacer material, etc. From comprehensive 3D device simulation, we have demonstrated that the proposed device is superior in performance to a conventional trigate FinFET and can be used to design low-power digital circuits.

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“…For some time 28nm bulk CMOS has been the main technology platform for mobile phone transceivers [4], [5]. However, a recent transition to FinFET is enabling more digital content and additional low power benefits for Analog and RF circuits [6]- [9]. In this context, a new low-power RF FinFET (ELVT) based on GLOBALFOUNDRIES 12nm node technology platform is fully investigated and compared with the existing SLVT FinFET in terms of DC/RF performance.…”

mentioning

confidence: 99%