112G PAM4/56G NRZ Interconnect Design for High Channel Count Packages

Liu, Hui; Ding, Qin; Jiang, Jenny Xiaohong

doi:10.1109/epeps.2018.8534221

“…Since multiple dies are stacked in the HBM, there are more interconnects that are required, and there are unique challenges which can be distinguished from a conventional interconnects, which means there are plenty of works that the interconnect design has to do. For example, the stacked DRAM is communicating with processing unit through the silicon interposer channel, which is quite different to the conventional channels such as channel response and crosstalk ( Ko et al, 2020 ; Liu, Ding & Jiang, 2018 ). In addition, the stacked DRAM dies are connected by TSV links whose characteristic is also very different ( Lee et al, 2015 , 2016 ; Kim et al, 2012 ).…”

Section: Memory and Storagementioning

confidence: 99%

Today’s computing challenges: opportunities for computer hardware design

Bae

¹

2021

PeerJ Computer Science

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Due to the explosive increase of digital data creation, demand on advancement of computing capability is ever increasing. However, the legacy approaches that we have used for continuous improvement of three elements of computer (process, memory, and interconnect) have started facing their limits, and therefore are not as effective as they used to be and are also expected to reach the end in the near future. Evidently, it is a large challenge for computer hardware industry. However, at the same time it also provides great opportunities for the hardware design industry to develop novel technologies and to take leadership away from incumbents. This paper reviews the technical challenges that today’s computing systems are facing and introduces potential directions for continuous advancement of computing capability, and discusses where computer hardware designers find good opportunities to contribute.

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“…Since multiple dies are stacked in the HBM, there are more interconnects that are required, and there are unique challenges which can be distinguished from a conventional interconnects, which means there are plenty of works that the interconnect design has to do. For example, the stacked DRAM is communicating with processing unit through the silicon interposer channel, which is quite different to the conventional channels such as channel response and crosstalk [61], [69]. In addition, the stacked DRAM dies are connected by TSV links whose characteristic is also very different [70]- [72].…”

Section: A Memory Scaling Limit and 3-d Integrationmentioning

confidence: 99%

Peer Review #1 of "Today’s computing challenges: opportunities for computer hardware design (v0.1)"

2021

0

View full text Add to dashboard Cite

Due to explosive increase of digital data creation, demand on advancement of computing capability is ever increasing. However, the legacy approaches that we have used for continuous improvement of three elements of computer (process, memory, and interconnect) have started facing limit, and therefore they are not as effective as they used to be and are also expected to reach the end in the near future. Evidently, it is a big challenge for computer hardware industry. However, at the same time it also provides great opportunities to hardware design industry to develop novel technologies and to take leadership away from incumbents. This paper reviews the technical challenges that today's computing systems are facing and introduces potential directions for continuous advancement of computing capability, and discusses where computer hardware designers find good opportunities to contribute.

show abstract

“…Since multiple dies are stacked in the HBM, there are more interconnects that are required, and there are unique challenges which can be distinguished from a conventional interconnects, which means there are plenty of works that the interconnect design has to do. For example, the stacked DRAM is communicating with processing unit through the silicon interposer channel, which is quite different to the conventional channels such as channel response and crosstalk [61], [69]. In addition, the stacked DRAM dies are connected by TSV links whose characteristic is also very different [70]- [72].…”

Section: A Memory Scaling Limit and 3-d Integrationmentioning

confidence: 99%

Peer Review #2 of "Today’s computing challenges: opportunities for computer hardware design (v0.2)"

2021

0

View full text Add to dashboard Cite

Due to explosive increase of digital data creation, demand on advancement of computing capability is ever increasing. However, the legacy approaches that we have used for continuous improvement of three elements of computer (process, memory, and interconnect) have started facing limit, and therefore they are not as effective as they used to be and are also expected to reach the end in the near future. Evidently, it is a big challenge for computer hardware industry. However, at the same time it also provides great opportunities to hardware design industry to develop novel technologies and to take leadership away from incumbents. This paper reviews the technical challenges that today's computing systems are facing and introduces potential directions for continuous advancement of computing capability, and discusses where computer hardware designers find good opportunities to contribute.

show abstract

112G PAM4/56G NRZ Interconnect Design for High Channel Count Packages

Cited by 12 publications

References 1 publication

Today’s computing challenges: opportunities for computer hardware design

Today’s computing challenges: opportunities for computer hardware design

Peer Review #1 of "Today’s computing challenges: opportunities for computer hardware design (v0.1)"

Peer Review #2 of "Today’s computing challenges: opportunities for computer hardware design (v0.2)"

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