112 Gb/s PAM-4 Silicon Photonics Receiver Integrated With SiGe-BiCMOS Linear TIA

Okamoto, Daisuke; Suzuki, Yoshishige; Takemura, Koichi; Fujikata, Junichi; Nakamura, Takahiro

doi:10.1109/lpt.2022.3144985

Cited by 14 publications

(2 citation statements)

References 17 publications

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“…To further increase the high-speed signal reception capability, we investigate the PAM4 format. The stress eye closure quaternary (SECQ) metric is a method calculating the penalty for RXs, which has the same definition as transmitter dispersion eye closure quaternary (TDECQ) [38]. In this work, the SECQ was measured at the Soft Decision FEC (SD-FEC) threshold of symbol error rate (SER) 4.8×10 -4 according to the IEEE 802.3cd standard.…”

Section: Eye Diagramsmentioning

confidence: 99%

1.28 Terabit-per-second all-silicon avalanche receiver

Peng,

Yuan,

Sorin

et al. 2023

Preprint

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To meet the exponential growth in data traffic, silicon (Si) photonics has emerged as a promising technology for ultra-high-speed and low-cost optical interconnects. However, achieving high-performance photodetectors (PDs) on Si photonics requires integrating narrower-bandgap materials, resulting in more complex fabrication processes, higher cost, and yield issues. To address this challenge, we demonstrate an all-Si solution showing a cost-efficient 8-channel double-microring resonator (MRR) avalanche photodiode (APD)-based receiver (RX) with an aggregate data rate of 1.28 Tb/s. All channels show excellent uniformity in their device performance with a responsivity of 0.4 A/W, an ultra-low dark current of 1 nA, a high bandwidth of 40 GHz, and a 𝑘 value of 0.28. To the best of our knowledge, this is the first demonstration of an all-Si RX supporting a record-high transmission data rate of 160 Gb/s per channel, along with ultralow electrical crosstalk of < -50 dB. This all Si optical RX can compete with the commercial heterojunction-based RXs and promises ~ 40% chip cost saving, thus paving the way to realize >3.2 Tb/s interconnects for future optical networks.

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Section: Eye Diagramsmentioning

confidence: 99%

1.28 Terabit-per-second all-silicon avalanche receiver

Peng,

Yuan,

Sorin

et al. 2023

Preprint

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“…It has been considered to be the most promising technology to deal with the ever-increasing network traffic [1][2][3]. Various integrated photonic devices or systems have been developed and optimized in recent years, such as silicon photonics switches [4], electro-optical modulators [5][6][7], photodetectors [8][9][10] and silicon photonic transceivers [11][12][13][14][15][16][17]. For real-world applications, optical interconnections between fibers and silicon photonic chips are crucial as high fiber-tochip coupling loss limits the performance of optical communication systems.…”

Section: ⅰ Introductionmentioning

confidence: 99%

Broadband Polarization-Independent Edge Couplers With High Efficiency Based on SiN-Si Dual-Stage Structure

Jiang,

Zhang,

Liu

2024

IEEE Photonics J.

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Silicon nitride (SiN) plays a critical role in silicon photonics because of its lower refractive index, low waveguide loss, broad operating bandwidth and compatibility with complementary metal oxide semiconductor (CMOS) fabrication process. Here, we propose a polarization-independent subwavelength grating (SWG) edge coupler with high efficiency based on SiN-Si dual-stage structure with a length of only 315.8 μm. Such a structure can be fabricated on 8-inch silicon photonics pilot lines and doesn't require special fabrication processes for making it suspended. We simulate the minimum TE/TM light coupling loss from a standard SMF-28 fiber to be 0.61 dB/0.95 dB with polarization dependent loss (PDL) less than 0.4 dB in the whole band between 1500 nm and 1600 nm.

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