100-ns electronically variable semiconductor memory using two diodes per memory cell

Waaben, S.; Waggener, H.A.

doi:10.1109/jssc.1970.1050112

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1970

1974

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Cited by 4 publications

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“…ries and only perhaps two times slower than for economical all-bipolar memories. Dynamic memory-cell circuits offer substantial silicon area savings over flip-flop designs, but stored information must be refreshed at intervals on the order of 1 ms [5], [6]. The system reliabilityy of such approaches remains to be demonstrated, and memory-cycle times are typically greater than for the flip-flop design described here.…”

Section: Considerablementioning

confidence: 99%