[No Title Available]

Abstract

We demonstrate the feasibility of using effective medium theory to reduce the computational complexity of full-wave models of inductors that are placed over interconnects. Placing inductors over interconnects is one way that designers can tackle the problem of reducing overall chip size, however this has heretofore been a difficult option to evaluate because of the prohibitive memory requirements and run times for detailed simulations of the inductor. Here we replace the interconnects with a homogeneous equivalent layer that mimics their impact on the inductor to within 2% error, but reducing runtime and memory use by 90% or more.