10-Gbps Signal Propagation of High-Density Wiring Interposer Using Photosensitive Polyimide for 3D Packaging

Abstract

We have developed a high-density wiring interposer for 10-Gbps signal propagation using a photosensitive polyimide. We optimized the basic properties of the photosensitive polyimide film for the fabrication of the interposer. We experimentally confirmed that the high-density wiring interposer could be fabricated using the optimized polyimide and gold multilayered structure. Fine metal wirings were smoothly covered by the polyimide film, as confirmed by scanning electron microscopy (SEM) of the cross section of the fabricated balanced pair strip-line structure. From the high-resolution differential time domain reflectometry (TDR) measurement, the differential impedance Z diff of a 12.5-µm-wide 12.4-mm-long balanced-pair strip-line was evaluated to be within 100 Ω ± 14.6 %. From the high-resolution differential time domain transmission (TDT) measurement, an insertion loss (S-parameter: S dd21 ) of -2.96 dB at 10 GHz through the differential strip-line was evaluated. Finally, we confirmed eye diagram measurement at 10 Gbps through the differential strip-line on the fabricated interposer. The aperture size of the measured eye diagram at 10 Gbps was sufficient for ultrahigh-speed signal propagation. IntroductionWith the increase in the operational speed and integration density of LSI chips, high-performance digital electronic systems have been realized. The clock frequency of a CPU-LSI chip exceeds the GHz range. However, to realize a computing system with a higher performance, the high-speed signal propagation performance of not only the LSI chips of computing systems but also LSI packages and interconnects must be improved. To obtain high-speed signal transmission in LSI packages and interconnects, line impedances should be

Applications driving 3D integration and corresponding manufacturing challenges

“…In an interposer-based technology on the other hand, a larger connection plate combine multiple 2D or stacked chips. The interposer can be made of glass as in [1] or it can be polymer-based as in [2]. Polyimide is used for the latter in this case.…”

Developing a leading practical application for 3D IC chip stacking technology

“…Elemental technologies for chip stacking process are the following: low-volume, lowresistance, and low internal stress TSV structure using low-k organic insulator; [17] micro-pitch, high-density, and micro-bump connection formed by a thermo-compression method using cone-shaped micro-bumps; [18]- [20] electroless plating connection for power source pads where the power source pad electrodes are connected by direct Ni-B and Au electroless plating after chip stacking; [21] [22] interposer with passive components where the thin film capacitors or the chip capacitors are embedded in the substrate; [23] [24] and others. Evaluation and inspection technologies are as follows: evaluation of electrical property in local fine structures using high-speed sharp step signals with 10-ps rising time; [25] evaluation of 20 Gbps high-speed digital signal transmission; [26] evaluation of power supply wiring impedance using impedance analyzer for 10 Hz -40 GHz super-wide bandwidth; [27] inspection of good chips where electrical testing can be done at chip level using the membrane fine pitch contact probe; [28] boundary scan embedded test circuit where total electrical connection test of fine interconnects can be conducted after stacking; [29] high-speed inspection of coneshape micro-bumps where wafer level shape optical inspection can be conducted by laser illumination and high-speed highresolution image sensors; [30] and others.…”

Developing an application for 3D IC chip stacking technology

“…チ高密度超多チャンネル微細バンプ接続 [18]- [20] 、チップ積 層後の電源パッド電極間を直接めっき法で接続する電源 パッド間ブリッジめっき接続 [21] [22] 、薄膜コンデンサおよび チップコンデンサを基板内に埋め込んだ受動部品内蔵イン ターポーザ [23] [24] 等、評価検査技術として、10 ps 高速立 ち上がりステップ信号を用いた局所微 細構造電気特性評 価 [25] 、20 Gbps デジタル高速信号 伝 送評 価 [26] 、10 Hz-40 GHz の超広帯域に対応したインピーダンスアナライザに よる電源供給配線インピーダンス評価 [27] 、メンブレン微細 ピッチコンタクトプローブによるチップレベルの電気検査が 可能な良品チップ検査 [28] 、積層後に微細接続部の全数電 気接続検査が可能なチップ間接続バウンダリスキャン検査 [29] 、レーザー照明と高速高精細画像センサーにより全数形 状検査が可能な微細円錐バンプ高速検査 [30]…”