10 Gb/s, 1&amp;#x00D7;4 optical link for DRAM interconnect

Pyo, Junghyung; Shin, Dongjae; Lee, K. H.; Ji, Ho-Chul; Na, K. W.; Cho, K. S.; Kim, S. G.; Joe, In-Sung; Suh, Sungsoo; Shin, Yong-hwack; Choi, Yong‐Sang; Hong, Sanghyun; Byun, Hyun-Geun; Lee, B. S.; Ha, K. H.; Park, Y. D.; Chung, Chilhee

doi:10.1109/group4.2011.6053819

Cited by 2 publications

References 7 publications

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Bulk-Si Platform: Born for DRAM, Upgraded With On-Chip Lasers, and Transplanted to LiDAR

Shin

Byun

Shim

et al. 2022

J. Lightwave Technol.

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The CMOS industry has been expecting silicon photonics to provide photonic and electro-photonic integrated circuits based on the CMOS processes and infrastructures for scalability of incumbent technology evolutions and creation of novel technologies. However, the compatibility with the legacy CMOS has been compromised with the development convenience of early silicon photonics in that the specialty silicon-on-insulator substrates have been widely used as integration platforms. Since this specialty substrate may hinder the photonics integration with legacy volume products later, a legacy-friendly integration platform with a generic bulk-silicon substrate has been developed for better compatibility. This paper overviews the bulk-silicon photonics platform born for DRAM integration, upgraded with III/V-on-bulk-Si lasers, and transplanted to LiDAR applications requiring the virtuous cycle of cost and volume. The photonics integration with DRAM was to resolve the speed-capacity tradeoff in the DRAM interconnects, and technical feasibility as well as lessons learned from the integration attempt are reviewed. The bulk-silicon device performance approaches that of silicon-oninsulator devices with the thermal advantage of ~40-% lower thermal impedance and the optical disadvantage of ~0.4-dB/mm higher waveguide loss. In the LiDAR applications, detection performance up to ~20 m at 20 fps by a single-chip scanner integrating tunable laser, semiconductor optical amplifiers, and optical phased array are presented with future outlooks.

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Bulk-Si Platform: Born for DRAM, Upgraded With On-Chip Lasers, and Transplanted to LiDAR

Shin

Byun

Shim

et al. 2022

J. Lightwave Technol.

View full text Add to dashboard Cite

show abstract

Integration of silicon photonics into electronic processes

2013

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Front-end monolithic integration has enabled photonic devices to be fabricated in bulk and thin-SOI CMOS as well as DRAM electronics processes. Utilizing the CMOS generic process model, integration was accomplished on multi-project wafers that were shared by standard electronic customers without requiring in-foundry process changes. Simple die or wafer-level post-processing has enabled low-loss waveguides by the removal of the substrate within photonic regions. The custom-process model of the DRAM industry instead enabled optimization of the photonic device fabrication process and the potential elimination of post-processing requirements. Integrated singlecrystalline silicon waveguide loss of ~3 dB/cm has been achieved within a 45nm thin-SOI CMOS process that is currently used to manufacture microprocessors [1]. A fully monolithic photonic transmitter including a pseudo-random bit sequence (PRBS) generating digital backend was also demonstrated within this process [1]. The constraints of zero-change integration have limited achieved polysilicon waveguide loss to ~50 dB/cm with commercially available bulk CMOS processes [2]. Custom polysilicon deposition and processing conditions available for DRAM integration have also led to the demonstration of ~6 dB/cm loss waveguides suitable for integration within electronics processes utilizing bulk silicon starting substrates [3]. An overview of required process features, device design guidelines and integration methodology tradeoffs will be presented. Relevant device metrics of area and energy efficiency as well as achievable photonic device performance will be presented within the context of monolithic front-end integration within state-ofthe-art electronics processes. Applications of this research towards the implementation of a computer system utilizing photonic interconnect for core-to-memory communication will also be discussed.

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10 Gb/s, 1×4 optical link for DRAM interconnect

Cited by 2 publications

References 7 publications

Bulk-Si Platform: Born for DRAM, Upgraded With On-Chip Lasers, and Transplanted to LiDAR

Bulk-Si Platform: Born for DRAM, Upgraded With On-Chip Lasers, and Transplanted to LiDAR

Integration of silicon photonics into electronic processes

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