1-cc computer using UWB-IR for wireless sensor network

2018 17th ACM/IEEE International Conference on Information Processing in Sensor Networks (IPSN)

Kempke

Dutta

2018

Ultra wideband technology has shown great promise for providing high-quality location estimation, even in complex indoor multipath environments, but existing ultra wideband systems require tens to hundreds of milliwatts during operation. Backscatter communication has demonstrated the viability of astonishingly low-power tags, but has thus far been restricted to narrowband systems with low localization resolution. The challenge to combining these complimentary technologies is that they share a compounding limitation, constrained transmit power. Regulations limit ultra wideband transmissions to just -41.3 dBm/MHz, and a backscatter device can only reflect the power it receives. The solution is long-term integration of this limited power, lifting the initially imperceptible signal out of the noise. This integration only works while the target is stationary. However, stationary describes the vast majority of objects, especially lost ones. With this insight, we design Slocalization, a sub-microwatt, decimeter-accurate localization system that opens a new tradeoff space in localization systems and realizes an energy, size, and cost point that invites the localization of every thing. To evaluate this concept, we implement an energy-harvesting Slocalization tag and find that Slocalization can recover ultra wideband backscatter in under fifteen minutes across thirty meters of space and localize tags with a mean 3D Euclidean error of only 30 cm.

Section: Scaling Down Slocalizationmentioning

confidence: 99%

Slocalization: Sub-uW Ultra Wideband Backscatter Localization

2018 17th ACM/IEEE International Conference on Information Processing in Sensor Networks (IPSN)

Kempke

Dutta

2018

“…From left to right Pister’s Smart Dust [37], the 1cc computer [21], “Smart Dew” [31], and our system with MBus show the feasibility of microscale systems, the techniques, such as 3D-stacking, employed to realize their size, and the volume and surface area constraints that lead to their extremely limited energy storage, energy harvesting, and I/O capabilities.…”

Section: Figurementioning

confidence: 99%

MBus

Proceedings of the 42nd Annual International Symposium on Computer Architecture

Lee

Kuo

et al. 2015

As we show in this paper, I/O has become the limiting factor in scaling down size and power toward the goal of invisible computing. Achieving this goal will require composing optimized and specialized—yet reusable—components with an interconnect that permits tiny, ultra-low power systems. In contrast to today’s interconnects which are limited by power-hungry pull-ups or high-overhead chip-select lines, our approach provides a superset of common bus features but at lower power, with fixed area and pin count, using fully synthesizable logic, and with surprisingly low protocol overhead. We present MBus, a new 4-pin, 22.6 pJ/bit/chip chip-to-chip interconnect made of two “shoot-through” rings. MBus facilitates ultra-low power system operation by implementing automatic power-gating of each chip in the system, easing the integration of active, inactive, and activating circuits on a single die. In addition, we introduce a new bus primitive: power oblivious communication, which guarantees message reception regardless of the recipient’s power state when a message is sent. This disentangles power management from communication, greatly simplifying the creation of viable, modular, and heterogeneous systems that operate on the order of nanowatts. To evaluate the viability, power, performance, overhead, and scalability of our design, we build both hardware and software implementations of MBus and show its seamless operation across two FPGAs and twelve custom chips from three different semiconductor processes. A three-chip, 2.2 mm3 MBus system draws 8 nW of total system standby power and uses only 22.6 pJ/bit/chip for communication. This is the lowest power for any system bus with MBus’s feature set.

“…However, few of these components have been integrated into complete systems. Some projects, like those shown in Figure 1, have built complete systems, but these usually have been monolithic, similar to early computers, designed with tight integration using custom interfaces [21,29,30,31,36].…”

Section: Introductionmentioning

confidence: 99%

MBus

SIGARCH Comput. Archit. News

Lee

Kuo

et al. 2015

As we show in this paper, I/O has become the limiting factor in scaling down size and power toward the goal of invisible computing. Achieving this goal will require composing optimized and specialized-yet reusable-components with an interconnect that permits tiny, ultra-low power systems. In contrast to today's interconnects which are limited by powerhungry pull-ups or high-overhead chip-select lines, our approach provides a superset of common bus features but at lower power, with fixed area and pin count, using fully synthesizable logic, and with surprisingly low protocol overhead. We present MBus, a new 4-pin, 22.6 pJ/bit/chip chip-tochip interconnect made of two "shoot-through" rings. MBus facilitates ultra-low power system operation by implementing automatic power-gating of each chip in the system, easing the integration of active, inactive, and activating circuits on a single die. In addition, we introduce a new bus primitive: power oblivious communication, which guarantees message reception regardless of the recipient's power state when a message is sent. This disentangles power management from communication, greatly simplifying the creation of viable, modular, and heterogeneous systems that operate on the order of nanowatts. To evaluate the viability, power, performance, overhead, and scalability of our design, we build both hardware and software implementations of MBus and show its seamless operation across two FPGAs and twelve custom chips from three different semiconductor processes. A three-chip, 2.2 mm 3 MBus system draws 8 nW of total system standby power and uses only 22.6 pJ/bit/chip for communication. This is the lowest power for any system bus with MBus's feature set.