0.6 V suppy voltage 0.25 μm E/D-HJFET(IS/sup 3/T) LSI technology for low power consumption and high speed LSIs

Abstract

A new technology of fabricating 0.25 pm gate E Dheterojunction FET LSIs is developed as a step towards the development of ultra low supply voltage LSIs. This technology, which is based upon all dry-process techniques, includes the formation of a 0.25 pm gate opening through the use of optical lithography and inner Si02 sidewalls. The fmax and the gmmax for a Y-shaped gate E-HJFET are 108 GHz and 520 mS/mm, respectively. Excellent performances are obtained with DCFL ring oscillators using n-AlGaAs/i-InGaAs pseudomorphic E/D-HJFETs. These include 18 ps/G unloaded delay and 109 ps/G loaded delay (FI=FO=3, L=lmm) with 0.15 mW/G at a low supply voltage of 0.6 V, where inverters have a sufficient noise margin of more than 180 mV. Also, 10 Gbps error-free operation of a selector switch is demonstrated with 9.4 mW at 0.6 V.

A 150 mW 8:1 MUX and a 170 mW 1:8 DEMUX for 2.4 gb/s optical-fiber communication systems using n-AlGaAs/i-InGaAs HJFET's

“…The MUX and DEMUX were fabricated by using 0.35-m gate -AlGaAs/ -InGaAs IS 3 HJFET's [1], which had of 45 GHz and of 120 GHz. The delay time measured by a DCFL 51-stage ring oscillator was 26 ps/gate with a power consumption of 0.2 mW/gate at a supply voltage of 0.7 V.…”

“…One effective way to decrease power consumption is to reduce the supply voltage. Direct-coupled field-effect transistor (FET) logic (DCFL) circuits based on i-InGaAs channel pseudomorphic heterojunction FET's (HJFET) on GaAs substrates [1], [2] are suitable for this, because these FET's have high cutoff frequency and low drain current saturation voltage. We have already demonstrated that DCFL D-FF's based on these FET's operated at 10 Gb/s with supply voltage below 1 V [3]- [5].…”

An ultra low power AlGaAs/InGaAs HJFET SCFL circuit for 10 Gbps applications with 1.3 V supply voltage

“…Minimizing source parasitic resistance (Rs) is also effective in lowering Vhee. Our 0.25pm gate HJFET fabricated by "inner sidewall assisted super self-aligned technology (IS3) [2]" decreased Rs by minimizing gate-to-source …”

An ultra-low-power-consumption high-speed GaAs 256/258 dual-modulus prescaler IC

“…The prescaler IC was fabricated by using a 0.2-pm-gate n-AlGaAs/i-InGaAs IS3HJFET [12]. The obtained g, , , , was 420 mS/mm, f , , , was 160 GHz, and fT was 70 GHz at V,, of 0.5 V. To avoid input signal waveform distortion, 50-9 on-chip termination was used.…”

“…To decrease power consumption, the supply voltage must be reduced. Since compound semiconductors have inherently high electron mobility, GaAs HJFET circuits can provide high-speed performance and low power consumption at low supply voltages of less than 1 V [12].…”