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in computing accelerators compared to high density storage-class memory, it is frequently important in computing applications to program multiple bits of information within every device by achieving many distinct conductance levels, while keeping the operating currents lower especially at the high conductance states. Operating in lower conductances is not only needed to reduce overall power consumption but also essential to improve the computing accuracy. For example, in analog matrix-vector multiplication, voltage drops across metal interconnect lines cause computational errors and, therefore, the memristor array size must be limited. [6,17,[20][21][22] Achieving lower memristor conductances lowers the voltage drop on the interconnect wires, allowing lower computing current and larger array sizes. This further benefits the energy and area efficiency by amortizing the costs of anolog to digital converters (ADC) required in the circuit. [4] However, existing demonstrations have a narrow dynamic range and achieving multiple low conductance levels is challenging. A larger ratio between the high and low conductances (on/off ratio) helps in achieving more distinct programmable low conductance levels. In addition, memristors are required to be integrated with CMOS circuits in many such applications. For instance, a 1-transistor-1-memristor (1T1M) combination provides in situ current compliance through gate voltage modulation so that the memristor can be programmed in an analog manner. [12,16,25] This brings another challenge: compatibility of memristor and CMOS. This includes not only material and fabrication compatibility, but also CMOS performance meeting the memristor operating requirements as both continue size scaling. Thus, it is essential to demonstrate all the aforementioned properties in nanometer-scale memristors repeatedly and reproducibly.Among various forms of memristors, oxide memristors outperform others by possessing the advantages of lower programming and computing energy, favorable scaling in cell size, [10,11,30] and CMOS-compatibility in materials and fabrication. Recently, many reports demonstrated enouraging results using multiple-bits in HfO x , TaO x , and other oxide memristors for neuromorphic computing applications, [23][24][25]31,32] making these highly promising if CMOS-integrated nanoscale devices can be demonstrated wtih wide dynamic range and promising yield numbers.Using memristors, such as oxide and phase change resistive switches, as tunable resistors to construct analog computing hardware accelerators is gaining keen attention. Such accelerators have demonstrated the potential to significantly outperform digital computers in highly relevant applications such as machine learning and image processing. However, improvements in device-level performance of memristors, including reducing power consumption and high current-induced metal migration in interconnects, need continued developments. Nanoscaling and complementary metal-oxide semiconductor (CMOS) integration are also of significant ...

Applications of memristor devices are quickly moving beyond computer memory to areas of analog and neuromorphic computation. These applications require the design of devices with different characteristics from binary memory, such as a large tunable range of conductance. A complete understanding of the conduction mechanisms and their corresponding state variable(s) is crucial for optimizing performance and designs in these applications. Here we present measurements of low bias I–V characteristics of 6 states in a Ta/ tantalum-oxide (TaOx)/Pt memristor spanning over 2 orders of magnitude in conductance and temperatures from 100 K to 500 K. Our measurements show that the 300 K device conduction is dominated by a temperature-insensitive current that varies with non-volatile memristor state, with an additional leakage contribution from a thermally-activated current channel that is nearly independent of the memristor state. We interpret these results with a parallel conduction model of Mott hopping and Schottky emission channels, fitting the voltage and temperature dependent experimental data for all memristor states with only two free parameters. The memristor conductance is linearly correlated with N, the density of electrons near EF participating in the Mott hopping conduction, revealing N to be the dominant state variable for low bias conduction in this system. Finally, we show that the Mott hopping sites can be ascribed to oxygen vacancies, where the local oxygen vacancy density responsible for critical hopping pathways controls the memristor conductance.

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A series of amine-functionalized poly(9,9-dihexylfluorene) (PFH) derivatives, PFH-NH 2 F-39-1 (P1), PFH-NH 2 F-19-1 (P2), PFH-NH 2 F-9-1 (P3), and PFH-NH 2 F-17-3 (P4), and PFH-NH 2 F-4-1 (P5), were developed to form organic/inorganic hybrid composites with CdSe/ZnS nanoparticle for polymeric light-emitting diodes (LEDs). The structures and purities of all desired polymers were fully characterized by 1H and 13C NMR, UV−vis and photoluminescent spectroscopy, gel permeation chromatography, elemental analyses. The hybrid nanocomposites were in situ formed through these amino-functionalized polyfluorene derivatives doped with core−shell CdSe/ZnS quantum dots (QDs). The detailed characterizations of their photophysical properties revealed that rapid Förster energy transfer from the conjugated polymers to the red-emitting QDs afforded an efficient red color emission. The preliminary polymeric LEDs fabrication with the configuration of ITO/DB/nanocomposites/Al achieved red emission for the in situ prepared hybrid nanocomposites. The investigation of device performance indicates that these nanocomposites are promising red light-emitting polymeric LED materials with good performance in providing excellent color purity, stability, and robustness. Such strategy provides us a platform to achieve red-emitting hybrid nanocomposites as the active materials for LEDs.