Many advanced applications of X-ray free-electron lasers require pulse durations and time resolutions of only a few femtoseconds. To generate these pulses and to apply them in time-resolved experiments, synchronization techniques that can simultaneously lock all independent components, including all accelerator modules and all external optical lasers, to better than the delivered free-electron laser pulse duration, are needed. Here we achieve all-optical synchronization at the soft X-ray free-electron laser FLASH and demonstrate facility-wide timing to better than 30 fs r.m.s. for 90 fs X-ray photon pulses. Crucially, our analysis indicates that the performance of this optical synchronization is limited primarily by the free-electron laser pulse duration, and should naturally scale to the sub-10 femtosecond level with shorter X-ray pulses.
Abstract-The linear accelerators employed to drive Free Electron Lasers (FELs), such as the X-ray Free Electron Laser (XFEL) currently being built in Hamburg, require sophisticated control systems. The Low Level Radio Frequency (LLRF) control system should stabilize the phase and amplitude of the electromagnetic field in accelerating modules with tolerances below 0.02 % for amplitude and 0.01 degree for phase to produce ultra-stable electron beam that meets the conditions required for Self-Amplified Spontaneous Emission (SASE). The LLRF control system of 32-cavity accelerating module of the XFEL accelerator requires acquisition of more than 100 analogue signals sampled with frequency around 100 MHz. Data processing in real-time loop should complete within a few hundreds of nanoseconds. Moreover, the LLRF control system should be reliable, upgradable and serviceable. The Advanced Telecommunications Computing Architecture (ATCA) standard, developed for telecommunication applications, can fulfil all of the above mentioned requirements.The paper presents the architecture of a prototype LLRF control system developed for the XFEL accelerator. The control system composed of ATCA carrier boards with Rear Transition Modules (RTM) is able to supervise 32 cavities. The crucial submodules, like DAQ, Vector Modulator or Timing Module, are designed according to AMC specification. The paper discusses results of the LLRF control system tests that were performed at the FLASH accelerator (DESY, Hamburg) during machine studies.
Abstract-The Advanced Telecommunications Computing Architecture (ATCA) and Micro Telecommunications Computing Architecture (µTCA) standards, collectively known as xTCA, provide a flexible and scalable infrastructure for designing complex control and data acquisition systems. The xTCA standards are becoming more and more popular in physics applications. Programmable devices, such as Field Programmable Gate Arrays (FPGAs), conventional and Digital Signal Processors (DSPs) are present on Advanced Mezzanine Card (AMC) modules and ATCA blades used in the xTCA crates. Those devices typically boot from non-volatile memories available on the modules. This paper deals with an universal framework and set of tools for upgrading firmware at such devices in xTCA systems. The proposed framework uses a fat pipe region interface of µTCA backplane for firmware data transmission and the Intelligent Platform Management Interface (IPMI) standard for PROM memory management and control of the upgrade procedure. This is the world's first attempt to implement the firmware upgrade in µTCA system not using JTAG Switch Module (JSM).
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