It is necessary to insert a switching delay time in pulse width modulation(PWM) voltage-fed inverters to avoid the short through of phase bridge. This causes well known dead time effect which distorts the output voltage and current. This paper puts forward a new three-level dead-time compensation method, which compensates dead time, turn on and off delay and forward voltage drop.A three-level inverter hardware platform was built based on FPGA and DSP, and the relevant experiment has been done on the 30kW three-phase induction motor. Experimental results verified the feasibility and correctness of the algorithm.
In this paper, we tested the heat dissipating performance of a self-developed 2 in 1 direct cooling IGBT module and contrasted with the traditional indirect cooling module, and a simulation model for the module was verified accurate. The experiment results show that entire thermal resistance of the direct cooling module is reduced up to 33%, meanwhile the temperature field distribution is more uniform. Then we conducted the heat dissipation structure design for a high power density inverter, and got a satisfactory result using the simulation model. At last, we tested the thermal resistance of direct cooling IGBT module in the inverter.I.
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