This paper reports the characterization of SPAD arrays fabricated in a 150 nm CMOS technology in view of applications to the detection of charged particles. The test vehicle contains SPADs with different active area and operated with different quenching techniques, either passive or active. The set of devices under test (DUTs) consists of single-tier chips, about 30 mm2 in area, with dual-tier structures where two chips are face-to-face bump bonded to each other. In the dual-layer structure obtained in this way, the coincidence signal between overlapping SPAD pairs is read out, with a beneficial impact on the dark count noise performance. The DUT characterization was mainly focused on studying the breakdown voltage in the single-layer arrays and the dark count rate (DCR), measured in different working conditions, in both the single- and the dual-layer structures. Comparison between the DCR performance of the two configurations clearly emphasizes the advantage of the coincidence readout architecture.
A compact probe for charged particle imaging, with potential applications in source activity mapping and radio-guided surgery was designed and tested. The development of this technology holds significant implications for medical imaging, offering healthcare professionals accurate and efficient tools for diagnoses and treatments. To fulfill the portability requirements of these applications, the probe was designed for battery operation and wireless communication with a PC. The core sensor is a dual-layer CMOS SPAD detector, fabricated using 150 nm technology, which uses overlapping cells to produce a coincidence signal and reduce the dark count rate (DCR). The sensor is managed and interfaced with a microcontroller, and custom firmware was developed to facilitate communication with the sensor. The performance of the probe was evaluated by characterizing the on-board SPAD detector in terms of the DCR, and the results were consistent with the characterization measurements taken on the same chip samples using a purposely developed benchtop setup.
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