Technologies are described which can completely fill contacts, via's and trenches with a PVD or CVD barrier metal film and a PVD AlCu plug. The presented processes are demonstrated to be applicable for contacts or via's having sizes down to 0.25 tm and aspect ratio's ofup to 5.The metallization ofsub-O.5 i.tm generation devices with up to 5 levels of interconnect puts stringent demands on the planarity ofeach interconnect layer. Small (less then 0.35 tm wide) contact and via holes, with depths in the range ofO.6 to 2.0 j.tm have to be filled completely with metal to provide a low resistance plug for inter-layer connections. Planar intra4evel connections either require filling narrow gaps between metal lines with dielectric, or in a dainascene approach [1], predefmed trenches in the dielectric must be completely filled with metal. Naturally in such a multilevel interconnect scheme processing temperatures must be limited to about 450°C, and possibly even lower for the higher lying levels.Contacts have traditionally been filled with a Ti/TiN liner followed by a conformal CVD-W deposition and planar etch back process [2]. Although this processing sequence has been proven to work in production ofsemiconductor devices, it is relatively expensive, complicated, and the W plug itself adds about 1 to the total resistance ofa 0.35 p.tm wide x 1 .tm deep via.A promising, and potentially much, more cost effective alternative to fill contacts, via's and trenches completely with low resistivity metals is Al planarization [3,4]. Both cold Al alloy deposition followed by a high temperature (about 500°C) flow in a separate high vacuum chamber [3] and cold deposition ofa nucleation layer followed by Al alloy deposition at about 450°C (cold/hot) [4] have been explored. In both cases, it is usually beneficial to deposit a Ti wetting layer to provide continuous metal coverage along sidewalls and bottom ofthe via or trench. Ofcourse, in contacts to Si, it is required to first deposit a barrier layer to prevent Al spiking through the junctions. This barrier layer must be able to prevent Al/Si interaction at the temperatures incurred during Al planarization and other back end processes.For higher aspect ratio contacts (>1.5:1 depth to diameter ratio) conformity of conventional PVD technologies is insufficient to provide adequate bottom coverage of TiN barrier layers or adequate sidewall and bottom coverage for Ti wetting layers and cold Al nucleation layers. Coherent Ti, TiN and Al deposition [5,6,7], which employs a collimation filter to remove low angle sputtered atoms from the total flux in combination with a specially designed magnetron, extends the use of PVD into the manufacturing of sub-0.5 tm generation devices. 70/SPIE Vol. 2335 0-8194-1668-1/94/$6.00 Downloaded From: http://proceedings.spiedigitallibrary.org/ on 06/22/2016 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx Low temperature MOCVD TiN techniques [8,9,10] have also been developed for application as conformal barrier layers. Thermal CVD ofTi has not yet ...
The TiC14 based CVD-Ti process has been identified as the candidate of choice for the advanced contact metallization. A BKM wet clean recovery (WCR) procedure, involving extended chamber seasoning, has been developed for the CVD-Ti process. The new WCR methodology takes only 5 wafer processing to stabilize the CVD-Ti chamber condition and film properties. It has been found that a chamber seasoning for 200 sec. performed after every idle time (> 15 mm.) and thermal periodic clean (at wafer count # 200), helps to maintain the CVD-Ti process performance. The reliability of the new chamber operating procedures was validated through a successful 3000 wafer marathon demonstration.
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