Recent Advances and Industrial Applications of Multilevel Converters

Abstract

Multilevel converters have been under research and development for more than three decades and have found successful industrial application. However, this is still a technology under development, and many new contributions and new commercial topologies have been reported in the last few years. The aim of this paper is to group and review these recent contributions, in order to establish the current state of the art and trends of the technology, to provide readers with a comprehensive and insightful review of where multilevel converter technology stands and is heading. This paper first presents a brief overview of well-established multilevel converters strongly oriented to their current state in industrial applications to then center the discussion on the new converters that have made their way into the industry. In addition, new promising topologies are discussed. Recent advances made in modulation and control of multilevel converters are also addressed. A great part of this paper is devoted to show nontraditional applications powered by multilevel converters and how multilevel converters are becoming an enabling technology in many industrial sectors. Finally, some future trends and challenges in the further development of this technology are discussed to motivate future contributions that address open problems and explore new possibilities.

Modelling approach for multi‐carrier‐based pulse‐width modulation techniques utilised in asymmetrical cascaded H‐bridge inverters

“…The total delay time at output voltage is 5.4 × 10 −4 s. This value is equal to 2.7% of the total time period that matches the THD difference between the theoretical and simulation results of 2.69%. and a 5% accuracy of that is considered in (1). Therefore, these simulation and analytical results are verified.…”

Modelling approach for multi‐carrier‐based pulse‐width modulation techniques utilised in asymmetrical cascaded H‐bridge inverters

“…The total delay time at output voltage is 5.4 × 10 −4 s. This value is equal to 2.7% of the total time period that matches the THD difference between the theoretical and simulation results of 2.69%. and a 5% accuracy of that is considered in (1). Therefore, these simulation and analytical results are verified.…”

Design of Boosted Multilevel DC-DC Converter for Solar Photovoltaic System

“…From the specifications of Table 2, it is anticipated that grid-connected systems need nominal power components and PV panels compared to topologies proposed in [14,15,[17][18][19][20]. Thus, it is confirmed that the proposed converter reduces the overall cost for grid-connected UPS applications.…”

A new voltage-balancing controller in cascaded multilevel converters

“…In Fig. 6 (e), without the voltagebalancing controller, 3 dc V becomes lower than 50 V and 1 dc V , 2 dc V becomes higher than 50 V when 3 R changes from 250 Ω to 220 Ω . While in Fig.…”

Modelling approach for multi‐carrier‐based pulse‐width modulation techniques utilised in asymmetrical cascaded H‐bridge inverters

“…The total delay time at output voltage is 5.4 × 10 −4 s. This value is equal to 2.7% of the total time period that matches the THD difference between the theoretical and simulation results of 2.69%. and a 5% accuracy of that is considered in (1). Therefore, these simulation and analytical results are verified.…”

Design of Boosted Multilevel DC-DC Converter for Solar Photovoltaic System

“…From the specifications of Table 2, it is anticipated that grid-connected systems need nominal power components and PV panels compared to topologies proposed in [14,15,[17][18][19][20]. Thus, it is confirmed that the proposed converter reduces the overall cost for grid-connected UPS applications.…”

A new voltage-balancing controller in cascaded multilevel converters

“…In Fig. 6 (e), without the voltagebalancing controller, 3 dc V becomes lower than 50 V and 1 dc V , 2 dc V becomes higher than 50 V when 3 R changes from 250 Ω to 220 Ω . While in Fig.…”

Modelling approach for multi‐carrier‐based pulse‐width modulation techniques utilised in asymmetrical cascaded H‐bridge inverters

“…The total delay time at output voltage is 5.4 × 10 −4 s. This value is equal to 2.7% of the total time period that matches the THD difference between the theoretical and simulation results of 2.69%. and a 5% accuracy of that is considered in (1). Therefore, these simulation and analytical results are verified.…”

Design of Boosted Multilevel DC-DC Converter for Solar Photovoltaic System

“…From the specifications of Table 2, it is anticipated that grid-connected systems need nominal power components and PV panels compared to topologies proposed in [14,15,[17][18][19][20]. Thus, it is confirmed that the proposed converter reduces the overall cost for grid-connected UPS applications.…”

A new voltage-balancing controller in cascaded multilevel converters

“…In Fig. 6 (e), without the voltagebalancing controller, 3 dc V becomes lower than 50 V and 1 dc V , 2 dc V becomes higher than 50 V when 3 R changes from 250 Ω to 220 Ω . While in Fig.…”