ZnO TFTs prepared by chemical bath deposition technique with high‐k La₂O₃ gate dielectric annealed in ambient atmosphere

Abstract

In this paper, the electrical properties of top‐gated thin‐film transistors with low‐cost chemical bath deposition (CBD) of ZnO as active material and a high‐k rare‐earth oxide La2O3 as gate dielectric have been reported. The source‐drain and gate electrodes and dielectric layers are fabricated by thermal evaporation techniques in high vacuum of the order of 10−6 Torr in a coplanar electrode structure. The channel length of the TFT is of 50 μm. The fabricated TFTs are annealed at 500 °C in air. The TFTs exhibit a field effect mobility 0.58 (cm2 V−1 s−1). Use of a high dielectric constant (high‐k) gate insulator reduces the threshold voltage and subthreshold swing of the TFTs. The TFTs exhibit a low threshold voltage of 4 V. The calculated values of gain–bandwidth product and subthreshold swing are also evaluated and presented. The ON/OFF ratio of the TFT is found to be 106.

Sol-Gel Derived Dip Coated ZnO – La2O3Thin Film Transistors

“…5 32 G.Bw = g m 2πC i [5] The calculated values of field effect mobility, threshold voltage, subthreshold swing, drain current ON/OFF ratio, transconductance and gain band-width product of the devices are presented in Table I. Table I also contains a comparison of the electrical parameters with some previous results 13,33 which shows significant improvement of the present results than that of the previous investigations. From the results mentioned in the Table I it can be concluded that the TFTs exhibit comparatively improved values of field effect mobility and high drain current ON-OFF ratio.…”

High-Performance Organic Field-Effect Transistors Using Rare Earth Metal Oxides as Dielectrics

“…22 The XRD measurements performed for the films of Sm 2 O 3 grown on glass (Figure S5, SI) revealed that they are predominantly comprised of cubic Sm 2 O 3 (c-Sm 2 O 3 ) phase, with a very small amount of monoclinic Sm 2 O 3 secondary phase. The lattice parameter of c-Sm 2 O 3 was estimated via Rietveld refinement assuming the Ia3̅ model 23 as a = 11.053 (2), which corresponds to the crystallographic density of 6.863 g/cm 3 assuming the ideal Sm 2 O 3 stoichiometry. The previously reported cell parameters for c-Sm 2 O 3 powders are smaller (a ∼ 10.92−10.93), 23,24 and the crystallographic density is accordingly slightly higher: ∼7.1 g/cm 3 .…”

“…Exploiting REOs as gate dielectrics is considered as one of the most promising ways for further evolution of Si-based electronic technologies nowadays. REOs were also used in field-effect transistors (FETs) with oxide semiconductors, − gallium nitride and other A­(III)–B­(V)-type semiconductors, transistors with carbon nanotubes (CNTs), etc …”

ALD Al2O3 gate dielectric on the reduction of interface trap density and the enhanced photo-electric performance of IGO TFT

“…11,12 High-k materials, such as Si 3 N 4 ($7), Al 2 O 3 ($9), MgO ($9.8), La 2 O 3 ($14), and ZrO x ($15), which increase the drain current due to their high dielectric constant values, improve the transistor device characteristics. [13][14][15][16][17][18][19] In the present study, the IGO thin lm transistor was investigated with different dielectrics. Sample A used SiO 2 as a dielectric by wet oxidation.…”