Vip

Abstract

Energy-efficient user-interactive and display-oriented applications on handhelds rely heavily on multiple accelerators (termed IP cores) to meet their periodic frame processing needs. Further, these platforms are starting to host multiple applications concurrently on the multiple CPU cores. Unfortunately, today's hardware exposes an interface that forces the host software (Android drivers) to treat each IP core as an isolated device. Consequently, the host CPU has to get involved in the (i) processing of each frame, (ii) scheduling them to ensure timely progress through the IP cores to meet their QoS needs, and (iii) explicitly having to move data from one IP core to the next, with main memory serving as the common staging area.We show in this paper through measurements on a Nexus 7 platform that the frequent invocation of the CPU for processing these frames and the involvement of main memory as a data flow conduit, are serious limitations. Instead, we propose a novel IP virtualization framework (VIP), involving three key ideas that allow several IPs to be chained together and made to appear to the software as a single device. First, chaining of IPs avoids data transfer through the memory system, enhancing the throughput of flows through the IPs. Second, by using a burst-mode, the CPU can initiate the processing of several frames through the virtual IP chain, without getting involved (and interrupted) for each frame, thereby allowing better energy saving and utilization opportunities. Removing the CPU from this loop, requires alternate orchestration of frame flows to ensure QoS guarantees for each frame of each application. Our third enhancement in VIP creates several virtual paths, one for each flow, through these IP chains with Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from Permissions@acm.org. ISCA '15,

IP-aware cache partition and replacement scheme for mobile computing devices

“…Victim selection: To choose a victim block for replacement, we first identify a set from which we choose a victim and compare the predicted and current CPU-IP shared region size for the set 3 . For a CPU memory reference, if the predicted size is bigger than the current size of the shared region, we choose a victim from the CPU-only region and set its CPU bit to 0, which reduces the size of the CPU-only region.…”

“…In [1,2,3], sub-framing, partitioning a frame into smaller ones, is proposed to reduce memory traffic. In that work, a memory controller bypasses the memory traffic from IPs to IPs directly without accessing the DRAM memory.…”

Toward Customized Hybrid Fuel-Cell and Battery-powered Mobile Device for Individual Users

“…A domain-aware coordinated DVFS policies, which can coordinate the DVFS state for each component of the mobile devices, was proposed to achieve high energy efficiency for the frame-based applications [37]. A new IP virtualization framework (VIP) was proposed for mobile devices, which allows many IPs to be chained together and be virtualized as a single one [38]. DORA, a dynamic frequency controller for energy efficient mobile web browsing was introduced [49].…”