2004
DOI: 10.1109/led.2004.827287
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Vertical p–i–n Polysilicon Diode With Antifuse for Stackable Field-Programmable ROM

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Cited by 40 publications
(18 citation statements)
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“…[1][2][3][4][5][6][7] While the manufacturing costs of hydrogenated amorphous silicon (a-Si:H) and polysilicon (polySi) devices are lower than single crystal silicon, they are still too high for itemlevel RFIDs, disposable sensors and ultra low-cost displays. In addition, drawbacks such as photosensitivity, nontransparency, light-or hot carrier-induced degradation, poor light emission characteristics, and costly and complicated processing limit their usage in potentially disruptive technologies such as transparent electronics and solution processed optoelectronics.…”
Section: Introductionmentioning
confidence: 99%
“…[1][2][3][4][5][6][7] While the manufacturing costs of hydrogenated amorphous silicon (a-Si:H) and polysilicon (polySi) devices are lower than single crystal silicon, they are still too high for itemlevel RFIDs, disposable sensors and ultra low-cost displays. In addition, drawbacks such as photosensitivity, nontransparency, light-or hot carrier-induced degradation, poor light emission characteristics, and costly and complicated processing limit their usage in potentially disruptive technologies such as transparent electronics and solution processed optoelectronics.…”
Section: Introductionmentioning
confidence: 99%
“…In the history of electronic engineering, one-time programmable (OTP) memories were mainly used for read-only-memory (ROM) applications where the central processing unit (CPU) instructions were stored to operate a whole computer system [1,2,3]. By grafting a novel structuring with the concept of OTP memory and the nanoscale silicon (Si) processes, innovative high-density nonvolatile memory (NVM) applications can be implemented.…”
Section: Introductionmentioning
confidence: 99%
“…Conventionally, most of the OTP is fabricated using either special process which requires additional masks in addition to the standard CMOS process available form common foundries [1]. Some high density OTP structures are not CMOS compatible in order to achieve very compact structure [2]. This will increase the design time and process cost as a result of more complicated design flow and processing steps.…”
Section: Introductionmentioning
confidence: 99%