2012
DOI: 10.3390/s120302667
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Abstract: While for years traditional wireless sensor nodes have been based on ultra-low power microcontrollers with sufficient but limited computing power, the complexity and number of tasks of today’s applications are constantly increasing. Increasing the node duty cycle is not feasible in all cases, so in many cases more computing power is required. This extra computing power may be achieved by either more powerful microcontrollers, though more power consumption or, in general, any solution capable of accelerating ta… Show more

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Cited by 41 publications
(35 citation statements)
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“…The experimental setup uses two different platforms to validate the model: the HiReCookie high-performance wireless sensor node (Spartan-6, XC6SLX150-2FGG484) [21], and the KC705 evaluation board from Xilinx (Kintex-7, XC7K325T-2FFG900). Both platforms have built-in circuitry to measure power consumption in different power rails.…”
Section: Resultsmentioning
confidence: 99%
“…The experimental setup uses two different platforms to validate the model: the HiReCookie high-performance wireless sensor node (Spartan-6, XC6SLX150-2FGG484) [21], and the KC705 evaluation board from Xilinx (Kintex-7, XC7K325T-2FFG900). Both platforms have built-in circuitry to measure power consumption in different power rails.…”
Section: Resultsmentioning
confidence: 99%
“…This low duty cycling approach is suitable when the platform has a small sleep power. With the advent of FLASH based FPGAs with a small sleep power consumption [4] and development of techniques to use SRAM based FPGAs [16] effectively for duty cycle applications, the reconfigurable platforms are the choice of WVSN with regard to data intensive tasks. Uniprocessors such as embedded processors are commonly employed for vision processing because of the availability of ready-to-use libraries.…”
Section: Postprocessing (G)mentioning
confidence: 99%
“…The main idea of the demonstration is to show how the Virtual Architecture ARTTCo 3 works within a high performance wireless sensor node called HiReCookie. The selected demo includes an image processing application with several filters running as different kernels within the architecture ARTICo 3 . The virtual architecture works in a Spartan-6 FPGA included in the HiReCookie Node, [3] and [4].…”
Section: Introductionmentioning
confidence: 99%
“…The selected demo includes an image processing application with several filters running as different kernels within the architecture ARTICo 3 . The virtual architecture works in a Spartan-6 FPGA included in the HiReCookie Node, [3] and [4]. During the demonstration, an image taken from a video camera attached to the node will be processed in real time by several dynamically reconfigurable kernels (median filters and edge detectors) under different working conditions.…”
Section: Introductionmentioning
confidence: 99%