Ultrathin high-K gate stacks for advanced CMOS devices

Gusev, Evgeni; Buchanan, D. A.; Cartier, E.; Kumar, Arvind; DiMaria, D. J.; Guha, Supratik; Callegari, A.; Zafar, Sufi; Jamison, P.; Neumayer, Deborah A.; Copel, M.; Gribelyuk, M.; Okorn‐Schmidt, Harald; D'Emic, C.; Kozlowski, P.; Chan, K.; Bojarczuk, N. A.; Ragnarsson, L.-Å.; Ronsheim, P.; Rim, K.; Fleming, R.J.; Mocuta, A.; Ajmera, A.

doi:10.1109/iedm.2001.979537

Cited by 184 publications

(150 citation statements)

References 16 publications

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“…HfO 2 is compatible with polysilicon processing, [2][3][4][5][6] has a high dielectric constant of ϳ16 -25, 2,7-9 and has demonstrated very encouraging initial device characteristics. [10][11][12][13][14][15] The thermal stability of high-materials in direct contact with Si and SiO 2 has also emerged as a key issue in selecting suitable high-candidates. The thermal stability of HfO 2 films in contact with Si and SiO 2 has been studied for HfO 2 deposited by atomic layer deposition ͑ALD͒, 16 ion beam assisted deposition, 17 metalorganic chemical vapor deposition, 18 and jet vapor deposition ͑JVD͒.…”

Section: Introductionmentioning

confidence: 99%

Morphology and crystallization kinetics in HfO2 thin films grown by atomic layer deposition

Gong

Wilk³

et al. 2003

Journal of Applied Physics

166

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We report the effects of annealing on the morphology and crystallization kinetics for the high-gate dielectric replacement candidate hafnium oxide (HfO 2 ). HfO 2 films were grown by atomic layer deposition ͑ALD͒ on thermal and chemical SiO 2 underlayers. High-sensitivity x-ray diffractometry shows that the as-deposited ALD HfO 2 films on thermal oxide are polycrystalline, containing both monoclinic and either tetragonal or orthorhombic phases with an average grain size of ϳ8.0 nm. Transmission electron microscopy shows a columnar grain structure. The monoclinic phase predominates as the annealing temperature and time increase, with the grain size reaching ϳ11.0 nm after annealing at 900°C for 24 h. The crystallized fraction of the film has a strong dependence on annealing temperature but not annealing time, indicating thermally activated grain growth. As-deposited ALD HfO 2 films on chemical oxide underlayers are amorphous, but show strong signatures of ordering at a subnanometer level in Z-contrast scanning transmission electron microscopy and fluctuation electron microscopy. These films show the same crystallization kinetics as the films on thermal oxide upon annealing.

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Section: Introductionmentioning

confidence: 99%

Morphology and crystallization kinetics in HfO2 thin films grown by atomic layer deposition

Gong

Wilk³

et al. 2003

Journal of Applied Physics

166

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“…However, if the thickness increases by 1 nm, the leakage current would decrease to 1/1000 so that the slope of the capacitance change would decrease to 1/1000 [10,11]. Therefore, it is expected that the device could store data for more than 3x10 8 s by increasing the thickness of SiO 2 to 3 nm.…”

Section: Data Retentionmentioning

confidence: 99%

“…However, a concern for this device is the interface between the Al 2 O 3 and Si. It has been reported that defects near the interface degrade the mobility in field-effect transistors considerably [10,11]. The low mobility causes low operation speed, which is 1/10 that of the conventional value.…”

Section: Introductionmentioning

confidence: 99%

Charge trapping characteristics of Al2O3/Al-rich Al2O3/SiO2 stacked films fabricated by radio-frequency magnetron co-sputtering

et al. 2011

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A thin-film structure comprising Al 2 O 3 /Al-rich Al 2 O 3 /SiO 2 was fabricated on Si substrate. We used radio-frequency magnetron co-sputtering with Al metal plates set on an Al 2 O 3 target to fabricate the Al-rich Al 2 O 3 thin film, which is used as a charge storage layer for nonvolatile Al 2 O 3 memory. We investigated the charge trapping characteristics of the film. When the applied voltage between the gate and the substrate is increased, the hysteresis window of capacitance-voltage (C-V) characteristics becomes larger, which is caused by the charge trapping in the film. , which is 2.6 times larger than that of the trap memory using SiN as the charge storage layer. The device structure would be promising for lowcost nonvolatile memory.

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“…Replacement of SiO 2 with high-k dielectric reduced the leakage current without compromising the device performance (25). Whereas SiO 2 is grown on the silicon surface, high-k dielectrics are normally deposited.…”

Section: Introductionmentioning

confidence: 99%

(Electronics & Photonics Division Award Presentation) Si-SiO₂ Interface to High-K-Ge/III-V Interface: Passivation and Reliability

Misra

2013

ECS Trans.

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The Si-SiO2 interface is one of the most important semiconductor-dielectric interfaces that has been studied extensively over many decades. The understanding and control of structural and electronic properties of Si-SiO2 interfaces has provided many clues for technological advancement. The article discusses how the Si-SiO2 interface migrated through the technological landscape like plasma processing damage, hot carrier effects and negative bias temperature instability (NBTI) and subsequent passivation techniques using hydrogen to nitrogen. Introduction of high-k gate dielectrics brought significant attention to the interface between silicon and high-k dielectrics but Si-SiO2 interface continued to be important because of the presence of a SiO2-based interfacial layer. With deposition of high-k gate dielectrics high carrier mobility substrates (Ge/III-V) are currently being considered as the channel materials. To obtain a high quality interface between the high-k dielectrics and the high mobility substrates some issues like deposition process, precise selection of deposition parameters, predeposition surface treatments, appropriate passivation techniques and subsequent annealing temperatures are also outlined.

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Ultrathin high-K gate stacks for advanced CMOS devices

Cited by 184 publications

References 16 publications

Morphology and crystallization kinetics in HfO2 thin films grown by atomic layer deposition

Morphology and crystallization kinetics in HfO2 thin films grown by atomic layer deposition

Charge trapping characteristics of Al2O3/Al-rich Al2O3/SiO2 stacked films fabricated by radio-frequency magnetron co-sputtering

(Electronics & Photonics Division Award Presentation) Si-SiO₂ Interface to High-K-Ge/III-V Interface: Passivation and Reliability

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Ultrathin high-K gate stacks for advanced CMOS devices

Cited by 184 publications

References 16 publications

Morphology and crystallization kinetics in HfO2 thin films grown by atomic layer deposition

Morphology and crystallization kinetics in HfO2 thin films grown by atomic layer deposition

Charge trapping characteristics of Al2O3/Al-rich Al2O3/SiO2 stacked films fabricated by radio-frequency magnetron co-sputtering

(Electronics & Photonics Division Award Presentation) Si-SiO2 Interface to High-K-Ge/III-V Interface: Passivation and Reliability

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(Electronics & Photonics Division Award Presentation) Si-SiO₂ Interface to High-K-Ge/III-V Interface: Passivation and Reliability