Triple-push oscillator approach: theory and experiments

2023 IEEE International Symposium on Circuits and Systems (ISCAS)

et al. 2023

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Section: Introductionmentioning

confidence: 99%

A harmonic cancellation-based high-frequency on-chip sinusoidal signal generator with calibration using a coarse-fine delay cell

2023 IEEE International Symposium on Circuits and Systems (ISCAS)

et al. 2023

“…The harmonic cancellation process linearizes a periodic signal by combining time-shifted and scaled versions of the original periodic signal [13]- [15]. Since the generation of digital square-wave signals is simple compared to other types of periodic signals, square-wave signals are considered in the paper.…”

Section: Introductionmentioning

confidence: 99%

Special Session: A high-frequency sinusoidal signal generation using harmonic cancellation

2023 IEEE 24th Latin American Test Symposium (LATS)

et al. 2023

An on-chip high-frequency sinusoidal signal generator with a calibration circuit based on a coarse-fine delay cell is presented in this work. The harmonic cancellation principle is used for signal generation by adding scaled and time-shifted versions of a periodic signal. However, as the output frequency increases in the GHz range, the harmonic cancellation can be severely affected by non-idealities such as mismatch and variations on timing parameters (phase difference, duty cycle) of the time-shifted signals. This degrades the spectral purity of the output signal. To counter this, a calibration circuit based on a coarse-fine delay cell is integrated into the system to correct the timing parameters of the signal. Simulation results show a THD better than −60 dB in the frequency range from 500 MHz to 2 GHz.

“…Harmonic cancellation is a linearization method that achieves the effective cancellation * Institute of Engineering Univ. Grenoble Alpes of a subset of harmonic components in a periodic signal by combining time-shifted and scaled versions of the original periodic signal [13]- [15].…”

Section: Introductionmentioning

confidence: 99%

On-chip calibration for high-speed harmonic cancellation-based sinusoidal signal generators

2022 IEEE 31st Asian Test Symposium (ATS)

et al. 2022

Harmonic cancellation techniques have been exploited for the on-chip generation of high-linearity sinusoidal test stimuli. The sinusoidal signal is generated by combining timeshifted and scaled versions of a periodical signal, in such a way that by properly choosing the time-shifts and weights, the lower order harmonics are canceled. However, process variations and mismatch can degrade the effectiveness of the harmonic cancellation, since precise time-shifts and scale ratios are required. In this regard, timing inaccuracies are especially harmful in the implementation of high-speed harmonic cancelling generators. In this paper, we propose an on-chip calibration architecture that can correct the phase-shift and duty-cycle of the signals with the help of a negative feedback loop. Electrical simulation results at transistor level show the feasibility of the calibration technique for a sinusoidal signal generator implemented in ST 28 nm FD-SOI technology. Obtained results show a Total Harmonic Distortion (THD) better than −60 dB after calibration in an output frequency range from 200 MHz to 4 GHz.