DOI: 10.1109/mtdt.1994.397184
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Abstract: A test chip in G a A s (E/D) technology has been designed and implemented in 1.2 p m MOSIS G a A s design rules. T h e unpackaged devices have been subjected to 1.5 keV A1 -K , X-rays and degradations in zero bias threshold voltage and device transconductance of n-channel E and D-MESFETs have been studied. A modified G a A s S R A M cell design, incorporating a circuit design t o minimize degradations in noise margindue t o degradations in device parameters at large radiation doses has been proposed.

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