Thermal Analysis and Interpolation Techniques for a Logic + WideIO Stacked DRAM Test Chip

On Mitigation of Side-Channel Attacks in 3D ICs

“…For example, Masti et al [5] have shown for Intel Xeon multi-core processors that (i) process executions on one core can be detected in adjacent cores, and that (ii) different processes, when scheduled by turns in one core, can build a covert channel with up to 12.5 bit/s. The TSC is particularly attractive for three reasons: (i) it is easy to access via widely available on-chip sensors [5,9,13,14]; (ii) it provides internal and external leakage of activity/computation patterns through thermal variations [4,5]; and (iii) it may serve as proxy for the power side-channel using temperature-to-power inter-polation techniques such as [19]. An attacker can obtain localized thermal readings either directly or estimate them, e.g., using interpolation techniques.…”

“…3D integration is expected to successfully meet the increasingly demanding requirements for modern ICs, such as high performance, increased functionality, and low power consumption [6][7][8]. While previous studies, early prototypes, and first commercial products have focused on memory-logic integration (e.g., see [7][8][9]), there is recent progress towards logic stacking as well, also driven by technology innovations such as direct wafer bonding [6].…”

“…is furthermore highly technology dependent [10][11][12]. In practice, 3D ICs will require runtime capabilities for thermal management, based on embedded on-chip thermal sensors [9,13,14].…”

Full-chip thermal map estimation for commercial multi-core CPUs with generative adversarial learning

“…However, very few physical sensors are typically available, and they may not be located in close proximity to the true hot-spots on the chip, consequently misleading the temperature regulation decision [7]. Hence, the more popular solution is to supplement the data from the few on-chip sensors with estimated temperatures of all the prominent hot-spots on the chip via thermal models based on estimated power-traces [8]. These methods offer higher spatial resolution as they allow for the temperature of all the hot-spots on the chip to be monitored in real-time [9][10][11][12].…”

The implementation of software and hardware for dynamic thermal management of electronic devices

“…提出基于均匀布置的传感器进行插值的 方法来估计热点温度. 此后有学者先后提出基于空间 距离构建温度关系的重构方法, 包括反距离加权 [18] 、 径向基函数插值 [19] , 基于克里金插值的传感器布置 [20] . 基于距离的温度场插值重构方法往往适用于热点温度 检测, 但是全局估计精度较差, 尤其是在传感器数量较 少的情况下.…”