The heterogeneous block architecture

Abstract

This paper makes two new observations that lead to a new heterogeneous core design. First, we observe that most serial code exhibits fine-grained heterogeneity: at the scale of tens or hundreds of instructions, regions of code fit different microarchitectures better (at the same point or at different points in time). Second, we observe that by grouping contiguous regions of instructions into blocks that are executed atomically, a core can exploit this heterogeneity: atomicity allows each block to be executed independently on its own execution backend that fits its characteristics best.Based on these observations, we propose a fine-grained heterogeneous design that combines heterogeneous execution backends into one core. Our core design, the heterogeneous block architecture (HBA), breaks the program into blocks of code, determines the best backend for each block, and specializes the block for that backend. As an initial, concrete design, we combine out-of-order, VLIW, and in-order backends, using simple heuristics to choose backends. We compare HBA to multiple baseline core designs (including monolithic out-of-order, clustered out-of-order, in-order and a state-of-the-art heterogeneous core design) and show that HBA can provide significantly better energy efficiency than all designs at similar performance. Averaged across 184 traces from a wide variety of workloads, HBA reduces core power by 36.4% and energy per instruction by 31.9% compared to a 4-wide out-of-order core. We conclude that HBA provides a flexible substrate for exploiting fine-grained heterogeneity, enabling new energy-performance tradeoff points in core design.

Nucleus

“…Prior work on the existence of phases at ne granularity and their potential micromanagement has shown that it is possible to exploit their bene ts through a heterogeneous system with di erent back-ends sharing the same front end [12,[20][21][22]. Despite the claim, no experimental data is provided that reveals the actual existence of application phases that appear at a ne granularity nor are the circumstances under which they can be exploited explained.…”

“…To reduce overall system slowdown when migrating, several studies propose the implementation of dedicated hardware to e ciently handle the transfer without any so ware intervention [12,13,18,21,26] and also fusing cores to share the front-end [20,22,24]. However, as hybrid designs are too complex to implement, it is worth investigating a simpler approach determining which components contribute most to the bene ts and sharing only those.…”

“…Recent studies claim that micro-phases in the order of thousands of instructions exist [12,30], as seen in Figure 1, and can be exploited to reduce energy consumption and boost performance through ne-grained migrations. In theory, perfect core matching should lead to optimal behaviour, however every time a migration is performed the working state needs to be transferred to the operating core, adding both a so ware and hardware execution overhead.…”

Exploring Fine-Grained Heterogeneity with Composite Cores

“…Varied voltage and frequency settings are used to create performance and power heterogeneity. Fallin et al uses customized atomic blocks to examine extremely finegrained heterogeneity [8]. Our solution combines the benefits of both architectural heterogeneity [20] and fast migration of only register state, and contributes a more sophisticated mechanism to estimate the inactive core's performance.…”

A Study of Dynamic Phase Adaptation Using a Dynamic Multicore Processor

“…DMPs contain hardware which can be modi ed post fabrication. Mitall's survey [14] de nes three types of modi able resources: the core count [9], number of resources that each core has [8] and microarchitectural features [1,7,21]. In our paper we focus on DMPs that modify the core count.…”