Temperature Impacts on Endurance and Read Disturbs in Charge-Trap 3D NAND Flash Memories

Abstract

Temperature effects should be well considered when designing flash-based memory systems, because they are a fundamental factor that affect both the performance and the reliability of NAND flash memories. In this work, aiming to comprehensively understanding the temperature effects on 3D NAND flash memory, triple-level-cell (TLC) mode charge-trap (CT) 3D NAND flash memory chips were characterized systematically in a wide temperature range (−30~70 °C), by focusing on the raw bit error rate (RBER) degradation during program/erase (P/E) cycling (endurance) and frequent reading (read disturb). It was observed that (1) the program time showed strong dependences on the temperature and P/E cycles, which could be well fitted by the proposed temperature-dependent cycling program time (TCPT) model; (2) RBER could be suppressed at higher temperatures, while its degradation weakly depended on the temperature, indicating that high-temperature operations would not accelerate the memory cells’ degradation; (3) read disturbs were much more serious at low temperatures, while it helped to recover a part of RBER at high temperatures.

Cryogenic Operation of 3-D Flash Memory for Storage Performance Improvement and Bit Cost Scaling

“…For the read disturb characteristics, the raw bit error rate (RBER) degradation at low temperatures has been reported recently [26]. In this study, we evaluate the cell characteristics mostly in the main distribution, and there seems to be no clear degradation in both program and read disturb.…”

Temperature-insensitive reading of a flash memory cell

“…Like MOSFET, the flash cell working performance is susceptible to temperature variation, which results from the dependence of the drain-source current on temperature. This thermal-induced effect can sometimes be useful, such as in designing temperature sensors or temperature memories [1] , but in most cases of flash applications, this thermal effect is considered undesirable because it gives bad working performances and various reliability issues [2−4] . Many methods have been proposed to avoid the temperature effect, such as adding extra peripheral circuits providing temperature bias control signals to improve voltage distribution [5,6] , using dummy cells as references to compensate for the temperature effect of current [7,8] , or resorting to complicated algorithms [9] .…”