Sytare: A Lightweight Kernel for NVRAM-Based Transiently-Powered Systems

Abstract

In a near future, energy harvesting is expected to replace batteries in ultra-low-power embedded systems. Research prototypes of such systems have recently been proposed. As the power harvested in the environment is very low, such systems need to cope with frequent power outages. They are referred to as transiently-powered systems (TPS). In order to execute non-trivial applications, TPS need to retain information between power losses. To achieve this goal, emerging nonvolatile memory (NVM) technologies are a key enabler: they provide a lightweight solution to retain, between power outages, the state of an application and of its peripheral devices. These include sensors, serial interface or radio devices for instance. Existing works have described various checkpointing mechanisms to adapt embedded applications to TPS but the use of peripherals was not yet handled. in these works. This paper proposes a solution for embedded applications using any peripheral device to run despite transient power. We follow a kerneloriented approach resulting in minimal impact on the programming model of the application. We implement the new concepts in our lightweight kernel called Sytare, running on an MSP430FR5739 micro-controller and we analyze the cost of the proposed solution.

Intermittent Computing with Peripherals, Formally Verified

“…We now give a formal description of interrupt-based checkpointing with peripherals [2,6,9,29]. The present model plays two roles.…”

“…Following earlier work on supporting peripherals in intermittent computation [2,6,9,17,29], we identify two key challenges: (C1) Peripherals add volatile and opaque state to the overall system; (C2) Peripherals have a concrete, observable impact on the environment of the system. The present work aims at providing a conceptual framework for (1) formally expressing these two requirements; and (2) proving that a general interrupt-based checkpointing scheme meets its specification.…”

“…In the next run, the bus will be resumed in its default state: if we resume the application where it lost power, it will fail to proceed as desired. Instead, one resolves to log the interaction with the peripherals and replay the log upon reboot [2,6,9]. Some operations must execute under continuous power to produce a meaningful outcome, as witnessed by our earlier radio device example.…”

Energy-driven computing

“…Another drawback is that reactive IC does not generally handle high-level atomicity constraints (C3) as gracefully as task-based or static methods. A solution to this is proposed in [53], where a formal division between application code (which accesses only application memory) and driver code (which accesses peripherals and non-volatile memory) assists a kernel to ensure atomic execution of driver-functions without introducing idempotency violations (C2). But adding atomicity to a reactive system can introduce sisyphean tasks (C4).…”

Enabling Failure-Resilient Intermittent Systems Without Runtime Checkpointing

“…The volatile states in main memory, including data, stacks, and heaps of tasks, can also be backed up to non-volatile memory so that the entire system can be recovered by restoring the checkpointed states after power resumption [10]. Various mechanisms based on the checkpointing paradigm have also been introduced to adapt peripheral I/O devices (e.g., sensors [13], Wi-Fi modules [14], and electrophoretic displays [20]) to intermittent power supply [4].…”