Sub-20 nm gate length FinFET design: Can high-κ spacers make a difference?

A Table-Based Approach to Study the Impact of Process Variations on FinFET Circuit Performance

“…The independent variation of L, TFIN, and EOT was reported at the single transistor level in [2], and it was further used for the process variations study in [8]. We verified the same for the buffer chain circuit in this paper for extreme cases (i.e., process corners) of process variations using mixed-mode simulations.…”

“…One of the major concerns about the usefulness of the FinFET technology-indeed, any novel technology-is the effect of statistical variations [2]- [5] in process parameters on the circuit/system performance [6]- [8]. For a novel technology, predicting the effect of statistical variations is difficult because accurate analytical models are either not available at all or are not sufficiently mature.…”

“…The LUT interpolation scheme is implemented for the study of process variations in L, TFIN, and EOT. FinFET device/circuit performance was reported to be most sensitive to variations in these three process parameters [2], [8]. Further, variations in L, TFIN, and EOT were also reported to be independent of each other [2], [8].…”

“…FinFET device/circuit performance was reported to be most sensitive to variations in these three process parameters [2], [8]. Further, variations in L, TFIN, and EOT were also reported to be independent of each other [2], [8]. The following 3σ variations of these process parameters reported in [2] and [8] are considered in this paper: ±2 nm for L (±10 %), ±1 nm for TFIN (±16 %), and ±0.1 nm for EOT (±11%).…”

“…For FinFETs also, analytical models are under investigation [9]. Mixed-mode (device-circuit) simulation has been used recently for predicting FinFET circuit performance in the presence of statistical variations [7], [8]. However, this approach is only useful for small circuits because of the excessive amount of computation time it requires.…”